G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation

Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
12/2007
12/13/2007	US20070288808 Method and system for detecting of errors within optical storage media
12/13/2007	US20070288807 Method And Apparatus Of Build-In Self-Diagnosis And Repair In A Memory With Syndrome Identification
12/13/2007	US20070288805 Method and apparatus for storing failing part locations in a module
12/13/2007	US20070288793 Independent polling for multi-page programming
12/13/2007	US20070286001 Semiconductor integrated circuit with memory redundancy circuit
12/13/2007	US20070285987 Non-volatile semiconductor memory device allowing efficient programming operation and erasing operation in short period of time
12/13/2007	US20070285981 Defective block handling in a flash memory device
12/13/2007	DE102006027448A1 Schaltungsanordnung Circuitry
12/13/2007	DE102006025291B3 Integrierter elektrischer Baustein mit regulären und redundanten Elementen Integrated electrical device with regular and redundant elements
12/12/2007	EP1864291A2 Method and apparatus for incorporating block redundancy in a memory array
12/12/2007	EP1537586B1 Circuit and method for testing embedded dram circuits through direct access mode
12/12/2007	CN101086899A Method and system for improving reliability of memory device
12/12/2007	CN101086898A 半导体存储装置 The semiconductor memory device
12/12/2007	CN100355052C Testing mode control device using nonvolatile ferroeletric storage
12/12/2007	CN100354979C Semiconductor storing device
12/12/2007	CN100354978C 半导体集成电路器件 The semiconductor integrated circuit device
12/11/2007	US7308639 Method of recording/reproducing data on storage medium
12/11/2007	US7308638 System and method for controlling application of an error correction code (ECC) algorithm in a memory subsystem
12/11/2007	US7308633 Master controller architecture
12/11/2007	US7308628 Input switching arrangement for a semiconductor circuit and test method for unidirectional input drivers in semiconductor circuits
12/11/2007	US7308624 Voltage monitoring test mode and test adapter
12/11/2007	US7308623 Integrated circuit and method for testing memory on the integrated circuit
12/11/2007	US7308622 Integrated memory and method for testing the memory
12/11/2007	US7308621 Testing of ECC memories
12/11/2007	US7308618 Interleaver and device for decoding digital signals comprising such an interleaver
12/11/2007	US7308598 Algorithm to encode and compress array redundancy data
12/11/2007	US7307907 SRAM device and a method of operating the same to reduce leakage current during a sleep mode
12/11/2007	US7307902 Memory correction system and method
12/11/2007	US7307886 Nonvolatile memory device including circuit formed of thin film transistors
12/11/2007	US7307881 Non-volatile semiconductor memory with large erase blocks storing cycle counts
12/11/2007	US7307441 Integrated circuit chips and wafers including on-chip test element group circuits, and methods of fabricating and testing same
12/11/2007	US7307020 Membrane 3D IC fabrication
12/11/2007	US7306957 Fabrication method of semiconductor integrated circuit device
12/06/2007	WO2007015979A3 Adaptive archival format
12/06/2007	US20070283224 System and method for efficient uncorrectable error detection in flash memory
12/06/2007	US20070283223 Systems, methods, and computer program products for providing a two-bit symbol bus error correcting code with all checkbits transferred last
12/06/2007	US20070283222 Apparatus, system, and method for dynamic recovery and restoration from design defects in an integrated circuit
12/06/2007	US20070283196 Flash memory device and data I/O operation method thereof
12/06/2007	US20070283195 Fault detection using redundant virtual machines
12/06/2007	US20070280033 Methods and devices for regulating the timing of control signals in integrated circuit memory devices
12/06/2007	US20070280032 Built-in system and method for testing integrated circuit timing parameters
12/06/2007	US20070280017 Nonvolatile Semiconductor Memory Device
12/06/2007	US20070280015 Semiconductor device
12/06/2007	US20070280014 Semiconductor device
12/06/2007	US20070280013 Semiconductor memory device, memory module having the same, the test method of memory module
12/06/2007	US20070280012 Semiconductor device
12/06/2007	US20070280011 Integrated electrical module with regular and redundant elements
12/06/2007	US20070280004 Nonvolatile semiconductor memory device and method of testing thereof
12/06/2007	US20070279984 Nonvolatile Semiconductor Storing Device and Block Redundancy Saving Method
12/06/2007	US20070279112 Semiconductor Memory
12/06/2007	US20070279111 Dll Circuit
12/06/2007	DE102006027381A1 Integrated memory device e.g. flash electrically erasable programmable ROM memory, for e.g. secure digital card, has signal source producing clock signal with preset frequency that is provided to connection of interface in operation mode
12/06/2007	DE10146931B4 Verfahren und Anordnung zum Ersetzen fehlerhafter Speicherzellen in Datenverarbeitungsvorrichtungen Method and apparatus for replacing defective memory cells in data processing devices
12/05/2007	CN101084556A Non-volatile memory and method with improved sensing
12/05/2007	CN101083142A 半导体器件 Semiconductor devices
12/05/2007	CN101083141A 半导体器件 Semiconductor devices
12/05/2007	CN101083140A Concurrent hardware selftest for central storage
12/05/2007	CN101083137A Nonvolatile semiconductor memory device and method of testing thereof
12/05/2007	CN101083131A Register file cell and circuits and methods for operating register file cell
12/05/2007	CN100353462C Method for characterizing active track and latch sense-amp (comparator) in one time programmable (OTP) salicided poly fuse array
12/05/2007	CN100353461C Test method for testing data memory
12/05/2007	CN100353456C Semiconductor memory storage
12/05/2007	CN100353455C Semiconductor integrated circuit with full speed data transition architecture and design method thereof
12/04/2007	US7305607 Nonvolatile ferroelectric memory device including failed cell correcting circuit
12/04/2007	US7305597 System and method for efficiently testing a large random access memory space
12/04/2007	US7305596 Nonvolatile memory and nonvolatile memory apparatus
12/04/2007	US7305595 Method, system, and product for isolating memory system defects to a particular memory system component
12/04/2007	US7305594 Integrated circuit in a maximum input/output configuration
12/04/2007	US7304901 Enabling memory redundancy during testing
12/04/2007	US7304895 Bitline variable methods and circuits for evaluating static memory cell dynamic stability
12/04/2007	US7304485 Analysis of the quality of contacts and vias in multi-metal fabrication processes of semiconductor devices, method and test chip architecture
12/04/2007	US7304355 Three-dimensional-memory-based self-test integrated circuits and methods
12/04/2007	US7304324 Semiconductor memory element and lifetime operation starting apparatus therefor
11/2007
11/29/2007	WO2007136812A2 Memory array having row redundancy and method
11/29/2007	WO2007103745A3 At-speed multi-port memory array test method and apparatus
11/29/2007	WO2004073041A3 Testing embedded memories in an integrated circuit
11/29/2007	US20070277076 Semiconductor Memory Device
11/29/2007	US20070277060 Use of Alternative Value in Cell Detection
11/29/2007	US20070276623 Semiconductor Component Test Process and a System for Testing Semiconductor Components
11/29/2007	US20070274143 Semiconductor device, electronic equipment and equipment authentication program
11/29/2007	US20070274142 Method and device of generating test circuit for semiconductor device
11/29/2007	DE19545743B4 Halbleiterspeichervorrichtung mit Speicherzellenmatrix A semiconductor memory device having memory cell array
11/29/2007	DE102006024016A1 Memory e.g. static random access memory, has input register connected with data input and input/output circuit, and output register connected with circuit, where output register continues to give test data to input register in test mode
11/29/2007	DE102004004796B4 Vorrichtung zur Datenübertragung zwischen Speichern Device for transmitting data between memories
11/29/2007	DE10126610B4 Speichermodul und Verfahren zum Testen eines Halbleiterchips Memory module and method for testing a semiconductor chip
11/28/2007	EP1860558A2 Method and apparatus for latent fault memory scrub in memory intensive computer hardware
11/28/2007	EP1859452A2 Multiply redundant raid system and xor-efficient implementation
11/28/2007	EP1540660B1 Method of and apparatus for detecting an error in writing to persistent memory
11/28/2007	CN101080778A Random access memory having test circuit
11/28/2007	CN101079328A Parallel programming of flash memory during in-circuit test
11/28/2007	CN101079327A Method and device of generating test circuit for semiconductor device
11/28/2007	CN101079326A Semiconductor memory device testing on/off state of on-die-termination circuit during data read mode, and test method of the state of on-die-termination circuit
11/28/2007	CN101079324A Storage device, its life monitoring device and monitoring method
11/28/2007	CN101079322A Multi-bit memory device and memory system
11/28/2007	CN101079321A Flash memory device including a dummy cell
11/27/2007	US7302623 Algorithm pattern generator for testing a memory device and memory tester using the same
11/27/2007	US7302622 Integrated memory having a test circuit for functional testing of the memory
11/27/2007	US7301836 Feature control circuitry for testing integrated circuits
11/27/2007	US7301835 Internally asymmetric methods and circuits for evaluating static memory cell dynamic stability
11/27/2007	US7301833 Shift redundancy circuit, method for controlling shift redundancy circuit, and semiconductor memory device

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