Patents
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
03/2008
03/12/2008EP1898427A2 Test method for semiconductor memory device and semiconductor memory device therefor
03/12/2008EP1756739A4 Efficient modeling of embedded memories in bounded memory checking
03/12/2008EP1509924B1 Semiconductor memory device with test mode to monitor internal timing control signals at i/o terminals
03/12/2008EP0992994B1 Optical disc recording/reproducing method, optical disc, and optical disc device
03/12/2008CN201036009Y Error-correcting information processing apparatus in BCH error-correcting technique
03/12/2008CN201036008Y Check code writing device in BCH error correction technique
03/12/2008CN101140809A Flash controller supporting pipelined error-correcting code and configurable operations and control method thereof
03/12/2008CN101140808A Error correcting information processing method in BCH error correcting technology and processing equipment thereof
03/12/2008CN101140807A Verify code write-in method and write device thereof in BCH error correcting technology
03/12/2008CN100375199C Semiconductor integrated circuit device
03/12/2008CN100375198C Semiconductor device equiped with memory and logical chips for testing memory ships
03/12/2008CN100375197C Method for testing non-volatile memory
03/12/2008CN100375196C Method for reading semiconductor die information in a parallel test and burn-in system
03/12/2008CN100375194C Semiconductor integrated circuit device
03/11/2008US7343546 Method and system for syndrome generation and data recovery
03/11/2008US7343545 Method for processing noise interference
03/11/2008US7343544 Optical disk playback apparatus and data playback method therefor
03/11/2008US7343536 Scan based automatic test pattern generation (ATPG) test circuit, test method using the test circuit, and scan chain reordering method
03/11/2008US7343535 Embedded testing capability for integrated serializer/deserializers
03/11/2008US7343534 Method for deferred data collection in a clock running system
03/11/2008US7343533 Hub for testing memory and methods thereof
03/11/2008US7343532 Testing memory units in a digital circuit
03/11/2008US7342843 Semiconductor integrated circuit device
03/06/2008WO2008005781A3 Improving reliability, availability, and serviceability in a memory device
03/06/2008WO2007134253A3 Use of alternative value in cell detection
03/06/2008WO2007134247A3 Dynamic cell bit resolution
03/06/2008US20080059865 Apparatus and method for generating a galois-field syndrome
03/06/2008US20080059861 Adaptive error resilience for streaming video transmission over a wireless network
03/06/2008US20080059852 Memory card and its initial setting method
03/06/2008US20080059851 Semiconductor apparatus and testing method
03/06/2008US20080059850 Self programmable shared bist for testing multiple memories
03/06/2008US20080059849 Semiconductor device
03/06/2008US20080059105 Memory-daughter-card-testing apparatus and method
03/06/2008US20080059103 System and Method for Implementing a Programmable DMA Master With Date Checking Utilizing a Drone System Controller
03/06/2008US20080056036 Semiconductor memory device
03/06/2008US20080056035 Method and apparatus for adaptive programming of flash memory, flash memory devices, and systems including flash memory having adaptive programming capability
03/06/2008US20080056034 Redundancy program circuit and methods thereof
03/06/2008US20080056033 Semiconductor memory device
03/06/2008US20080056032 Test method for semiconductor memory device and semiconductor memory device therefor
03/06/2008US20080056025 Semiconductor storage device
03/06/2008US20080055989 Memory system including flash memory and method of operating the same
03/06/2008US20080055986 Semiconductor memory device having faulty cells
03/06/2008DE112004002723T5 Prüfvorrichtung und -verfahren für eine Halbleitervorrichtung Tester and method for a semiconductor device
03/06/2008DE112004002576T5 Management externer Speicheraktualisierung zur Fehlererfassung in redundanten Multithreading-Systemen unter Verwendung einer spekulativen Speicherunterstützung Management of external memory update for error detection in redundant multithreading systems using a speculative memory support
03/05/2008EP1895546A1 Semiconductor memory and system
03/05/2008EP1894208A1 Method and apparatus for programming a memory array
03/05/2008EP1665404A4 Multiple bit chalcogenide storage device
03/05/2008CN101136253A Test method for semiconductor memory device and semiconductor memory device therefor
03/05/2008CN101136252A Repair circuitry and method for preventing electrical fuse from being burned during static discharge testing
03/05/2008CN101136251A Degeneration technique for designing memory devices
03/04/2008US7340665 Shared redundancy in error correcting code
03/04/2008US7340658 Technique for combining scan test and memory built-in self test
03/04/2008US7340653 Method for testing a memory device
03/04/2008US7340558 Multisection memory bank system
03/04/2008US7340313 Monitoring device for monitoring internal signals during initialization of an electronic circuit
03/04/2008US7339844 Memory device fail summary data reduction for improved redundancy analysis
03/04/2008US7339843 Methods and circuits for programming addresses of failed memory cells in a memory device
03/04/2008US7339831 Non-volatile semiconductor memory device allowing efficient programming operation and erasing operation in short period of time
02/2008
02/28/2008WO2008023334A2 Method for testing a static random access memory
02/28/2008WO2007133963A3 Nonvolatile memory with convolutional coding for error correction
02/28/2008US20080052602 Writing and reading of data in probe-based data storage devices
02/28/2008US20080052601 Writing and reading of data in probe-based data storage devices
02/28/2008US20080052600 Data corruption avoidance in DRAM chip sparing
02/28/2008US20080052599 Dynamic electronic correction code feedback to extend memory device lifetime
02/28/2008US20080052598 Memory multi-bit error correction and hot replace without mirroring
02/28/2008US20080052571 Memory test system including semiconductor memory device suitable for testing an on-die termination, and method thereof
02/28/2008US20080052570 Memory device testable without using data and dataless test method
02/28/2008US20080052568 System and Method for Managing Mirrored Memory Transactions and Error Recovery
02/28/2008US20080052567 Semiconductor memory device and method thereof
02/28/2008US20080052565 Data read-out circuit in semiconductor memory device and method of data reading in semiconductor memory device
02/28/2008US20080049527 Method for testing memory device
02/28/2008US20080049526 Semiconductor memory device with data and local redundancy memory cell arrays, and redundancy method thereof
02/28/2008US20080049525 Integrated Semiconductor Memory and Method for Operating an Integrated Semiconductor Memory
02/28/2008US20080049523 Line defect detection circuit for detecting weak line
02/28/2008US20080049514 Memory device with a managing microprocessor system and an architecture of fail search and automatic redundancy
02/28/2008US20080048703 Semiconductor integrated circuit and testing method of same
02/28/2008DE102007038114A1 Error correction circuit for correction of error in memory cell e.g. read only memory, has main control unit is formed for determining definite error location based on error type and output is determined by two error locating detectors
02/28/2008DE102007032273A1 Direktzugriffsspeicher mit Prüfschaltung Random access memory with test circuit
02/28/2008DE102006019507B4 Integrierter Halbleiterspeicher mit Testfunktion und Verfahren zum Testen eines integrierten Halbleiterspeichers Integrated semiconductor memory with test function and method for testing an integrated semiconductor memory,
02/27/2008EP1892726A2 Semiconductor integrated circuit and test method thereof
02/27/2008EP1892725A2 Semiconductor integrated circuit and testing method of same
02/27/2008EP1891661A1 Test cells for semiconductor yield improvement
02/27/2008CN101131999A Semiconductor integrated circuit and testing method of same
02/27/2008CN101131876A Error correction circuit and method, and semiconductor memory device including the circuit
02/27/2008CN101131875A Register testing method and system
02/27/2008CN101131874A Semiconductor integrated circuit and test method thereof
02/27/2008CN101131870A Flash memory devices including block information blocks and methods of operating same
02/27/2008CN100371727C Electronic circuit and method for testing
02/26/2008US7337381 Memory tester having defect analysis memory with two storage sections
02/26/2008US7337378 Semiconductor integrated circuit and burn-in test method thereof
02/26/2008US7336559 Delay-locked loop, integrated circuit having the same, and method of driving the same
02/26/2008US7336537 Handling defective memory blocks of NAND memory devices
02/26/2008US7336536 Handling defective memory blocks of NAND memory devices
02/26/2008US7336529 Thin film magnetic memory device storing program information efficiently and stably
02/26/2008US7336081 Cell evaluation device including short circuit detector
02/26/2008US7335957 Semiconductor memory integrated circuit and layout method of the same
02/21/2008WO2008022094A2 Data storage device
02/21/2008WO2008021989A2 Error correction for disk storage media
02/21/2008WO2008021045A2 System and method for correcting errors in non-volatile memory using product codes
02/21/2008WO2008020555A1 Test device and test method