Patents
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
07/2007
07/03/2007US7240257 Memory test circuit and test system
07/03/2007US7240256 Semiconductor memory test apparatus and method for address generation for defect analysis
07/03/2007US7240255 Area efficient BIST system for memories
07/03/2007US7240254 Multiple power levels for a chip within a multi-chip semiconductor package
07/03/2007US7240253 Semiconductor storage device
07/03/2007US7239568 Current threshold detector
07/03/2007US7239564 Semiconductor device for rectifying memory defects
07/03/2007US7239563 Semiconductor device for outputting data read from a read only storage device
07/03/2007US7239546 Semiconductor device with a nonvolatile semiconductor memory circuit and a plurality of IO blocks
06/2007
06/28/2007WO2007072580A1 Memory-redundancy selecting device, memory device, information processing device, and method of selecting redundancy of memory cell
06/28/2007WO2007041253A3 Motor and controller inversion: commanding torque to position-controlled robots
06/28/2007US20070150793 Rewrite strategy and methods and systems for error correction in high-density recording
06/28/2007US20070150792 Memory module comprising a plurality of memory devices
06/28/2007US20070150791 Storing downloadable firmware on bulk media
06/28/2007US20070150790 Method of storing downloadable firmware on bulk media
06/28/2007US20070150779 Lithographic apparatus and device manufacturing method
06/28/2007US20070150778 Lithographic apparatus and device manufacturing method
06/28/2007US20070150777 Memory test circuit and method
06/28/2007US20070150649 Nonvolatile memory and method of address management
06/28/2007US20070147150 Nonvolatile memory
06/28/2007US20070147148 Semiconductor memory device
06/28/2007US20070147146 Semiconductor memory
06/28/2007US20070147145 Address Path Circuit With Row Redundant Scheme
06/28/2007US20070147144 Semiconductor integrated circuit device
06/28/2007US20070146183 High-speed digital multiplexer
06/28/2007US20070146000 Semiconductor test apparatus
06/28/2007DE10224283B4 Verfahren zur Speichersteuerung A process for the memory controller
06/28/2007DE102006062399A1 Halbleiterspeicherbauelement mit mehreren Speicherbereichen, Zugriffsverfahren und Testverfahren A semiconductor memory device having a plurality of memory areas, access and Testing Procedures
06/28/2007DE102006020173A1 Stored data managing method for vehicle, involves detecting critical memory cells, scanning free memory cells, and changing data addresses of data of critical memory cells of memory to free memory cells of memory
06/27/2007EP1800323A2 LOW VOLTAGE PROGRAMMABLE eFUSE WITH DIFFERENTIAL SENSING SCHEME
06/27/2007CN1988046A Semiconductor leakage current detector and leakage current measurement method, and semiconductor intergrated circuit thereof
06/27/2007CN1988045A Semiconductor apparatus, semiconductor storage apparatus, control signal generation method, and replacing method
06/27/2007CN1988044A Test patterns to insure read signal integrity for high speed ddr dram
06/27/2007CN1988043A Method for detecting electronic magnetic disc
06/27/2007CN1988033A Multi-port semiconductor memory device having variable access paths and method therefor
06/26/2007US7237177 Method of calculating internal signals for use in a map algorithm
06/26/2007US7237176 Partitioning data for error correction
06/26/2007US7237175 Memory circuit
06/26/2007US7237172 Error detection and correction in a CAM
06/26/2007US7237165 Method for testing embedded DRAM arrays
06/26/2007US7237158 Intelligent binning for electrically repairable semiconductor chips
06/26/2007US7237157 Procedure and device for identifying an operating mode of a controlled device
06/26/2007US7237156 Content addressable memory with error detection
06/26/2007US7237155 Testing method for permanent electrical removal of an intergrated circuit output after packaging
06/26/2007US7237154 Apparatus and method to generate a repair signature
06/26/2007US7237153 Integrated memory and method for testing an integrated memory
06/26/2007US7237057 Window-based flash memory storage system and management and access methods thereof
06/26/2007US7236413 Semiconductor memory device
06/26/2007US7236412 Integrated semiconductor memory with redundant memory cells replaceable for either true or complementary defective memory cells
06/26/2007US7236409 Semiconductor memory device provided with constant-current circuit having current trimming function
06/26/2007US7236397 Redundancy circuit for NAND flash memory device
06/26/2007US7236392 Method and apparatus for testing tunnel magnetoresistive effect element
06/21/2007US20070143650 Mechanism for read-only memory built-in self-test
06/21/2007US20070143649 Test patterns to insure read signal integrity for high speed DDR DRAM
06/21/2007US20070143648 Memory timing model with back-annotating
06/21/2007US20070143647 Pulsed flop with scan circuitry
06/21/2007US20070143646 Tolerating memory errors by hot-ejecting portions of memory
06/21/2007US20070140036 Semiconductor memory device
06/21/2007US20070140025 Method and apparatus for testing a fully buffered memory module
06/21/2007US20070140024 Random access memory including circuit to compress comparison results
06/21/2007US20070140023 Integrated dynamic random access memory chip
06/21/2007DE19921232B4 Verfahren zum gesicherten Schreiben eines Zeigers für einen Ringspeicher, zugehöriger Ringspeicher, Verwendung des Ringspeichers und Chipkarte mit Ringspeicher Method for the secure writing a pointer to a ring buffer, related storage ring, using the ring memory and chip card with circular buffer
06/21/2007DE102005060086A1 Series resistance and/or resistance-capacitance-constant measuring method for e.g. dynamic random access memory, involves connecting storage cell to ring oscillator, and measuring frequencies that are resulting from oscillator
06/20/2007CN1983453A Serial presence detect functionality on memory component
06/20/2007CN1983452A Multiport semiconductor memory device
06/20/2007CN1983451A 半导体存储装置 The semiconductor memory device
06/20/2007CN1322585C Fuse element and integrated circuit device using said element
06/19/2007US7234102 Data recording method for optical disk drive
06/19/2007US7234099 High reliability memory module with a fault tolerant address and command bus
06/19/2007US7234087 External storage device and memory access control method thereof
06/19/2007US7234049 Computer system with NAND flash memory for booting and storage
06/19/2007US7233180 Circuits and methods of temperature compensation for refresh oscillator
06/19/2007US7232696 Semiconductor integrated circuit and method for detecting soft defects in static memory cell
06/14/2007WO2007066541A1 Test device and test method
06/14/2007WO2007066523A1 Testing apparatus and method
06/14/2007US20070136642 Conditional access to store content using non-standard media
06/14/2007US20070136641 Unified memory architecture for recording applications
06/14/2007US20070136640 Defect detection and repair in an embedded random access memory
06/14/2007US20070136639 Method for adapting a memory system to operate with a legacy host originally designed to operate with a different memory system
06/14/2007US20070136628 Testing apparatus and testing method
06/14/2007US20070136627 System and method for testing write strobe timing margins in memory devices
06/14/2007US20070136626 Storage efficient memory system with integrated BIST function
06/14/2007US20070136625 Test apparatus and test method
06/14/2007US20070136624 Failure recovering method and recording apparatus
06/14/2007US20070133326 Semiconductor memory device
06/14/2007US20070133325 Semiconductor memory device, test system including the same and repair method of semiconductor memory device
06/14/2007US20070133324 Semiconductor device for outputting data read from a read only storage device
06/14/2007US20070133323 Repair circuit and method of repairing defects in a semiconductor memory device
06/14/2007US20070133322 Memory and method for improving the reliability of a memory having a used memory region and an unused memory region
06/14/2007US20070133254 Test mode control device using nonvolatile ferroelectric memory
06/14/2007US20070133253 Test mode control device using nonvolatile ferroelectric memory
06/14/2007DE102006058895A1 Speicherbauelement und Speicherverfahren für Nutzdaten und Paritätsdaten Memory device and method for storage of user data and parity data
06/14/2007DE102006050234A1 Schaltung und Verfahren zum Testen eines Halbleiterspeicherelements und Halbleiterspeicherelement Circuit and method for testing a semiconductor memory device and semiconductor memory element
06/14/2007DE102005053625A1 Memory module e.g. dynamic RAM, for storing data, has effective bits and parity bits for error correction, and set of rank groups, where individually assigned parity bit-memory module for each rank group is provided
06/14/2007DE10107427B4 Halbleiterspeichervorrichtung A semiconductor memory device
06/13/2007EP0953987B1 Synchronous semiconductor storage device
06/13/2007CN1979691A 半导体存储器件 The semiconductor memory device
06/13/2007CN1979690A Built-in type self-test starting method and system
06/13/2007CN1979689A Method for analyzing storage volume of portable storage device
06/13/2007CN1979688A Memory detection clamp