Patents
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
01/2008
01/08/2008US7317645 Redundancy repair circuit and a redundancy repair method therefor
01/08/2008US7317323 Signal test procedure for testing semi-conductor components and a test apparatus for testing semi-conductor components
01/03/2008WO2008002903A2 Data validation and classification in optical analysis systems
01/03/2008WO2008002513A2 Integrated circuit having memory array including ecc and/or column redundancy, and method of programming, controlling and/or operating same
01/03/2008WO2008001543A1 Semiconductor testing apparatus and semiconductor memory testing method
01/03/2008WO2007112201B1 Non-volatile memory and method with redundancy data buffered in data latches for defective locations
01/03/2008US20080005645 Magnetic disk control apparatus, magnetic disk apparatus, and method of correcting read error
01/03/2008US20080005644 Systems, methods and computer program products for utilizing a spare lane for additional checkbits
01/03/2008US20080005631 Memory module with parallel testing
01/03/2008US20080005630 Memory device testing system and method using compressed fail data
01/03/2008US20080002493 Dual in-line memory module, memory test system, and method for operating the dual in-line memory module
01/03/2008US20080002491 Semiconductor memory device capable of effectively testing failure of data
01/03/2008US20080002490 Semiconductor memory device with internal voltage generator and method for driving the same
01/03/2008US20080002489 Method for testing memory under worse-than-normal conditions
01/03/2008US20080002488 Semiconductor device and memory circuit including a redundancy arrangement
01/03/2008US20080002486 Method for accessing a memory
01/03/2008DE112005003425T5 Einzelchip mit magnetoresistivem Speicher Single chip magnetoresistive memory
01/02/2008EP1873787A1 Automatic regulation method for the reference sources in a non volatile memory device and corresponding memory device
01/02/2008EP1671328A4 Accelerated life test of mram celles
01/02/2008CN101097784A Improving reliability, availability, and serviceability in a memory device
01/02/2008CN101097783A Method for testing memory
01/02/2008CN100359608C Storage test circuit
01/02/2008CN100359604C Semiconductor storage device
01/02/2008CN100359596C Semiconductor memory having enhanced testing power
01/02/2008CN100359473C Memory rewind and reconstruction for hardware emulator
01/01/2008US7315993 Verification of RRAM tiling netlist
01/01/2008US7315976 Method for using CRC as metadata to protect against drive anomaly errors in a storage array
01/01/2008US7315971 Systems and methods for improved memory scan testability
01/01/2008US7315970 Semiconductor device to improve data retention characteristics of DRAM
01/01/2008US7315969 Memory module with a test device
01/01/2008US7315870 Memory controller, flash memory system, and method for recording data on flash memory
01/01/2008US7315792 Temperature detector providing multiple detected temperature points using single branch and method of detecting shifted temperature
01/01/2008US7315479 Redundant memory incorporating serially-connected relief information storage
12/2007
12/27/2007US20070300133 Method for recovering data in a tape drive system
12/27/2007US20070300132 Apparatus and method for defect replacement
12/27/2007US20070300131 Register file cell with soft error detection and circuits and methods using the cell
12/27/2007US20070300130 Method of Error Correction Coding for Multiple-Sector Pages in Flash Memory Devices
12/27/2007US20070300129 System, method and storage medium for providing fault detection and correction in a memory subsystem
12/27/2007US20070300128 A method and apparatus of defect areas management
12/27/2007US20070300105 Memory hub tester interface and method for use thereof
12/27/2007US20070300100 Error correction scheme for memory
12/27/2007US20070300014 Debug port for on-die DRAM
12/27/2007US20070297266 Synchronous global controller for enhanced pipelining
12/27/2007US20070297255 Semiconductor memory tester
12/27/2007US20070297254 Method to Identify or Screen VMIN Drift on Memory Cells During Burn-In or Operation
12/27/2007US20070297253 Measuring circuit for qualifying a memory located on a semiconductor device
12/27/2007US20070297252 Integrated circuit having memory array including ECC and/or column redundancy, and method of programming, controlling and/or operating same
12/27/2007US20070297251 Semiconductor memory device having memory block configuration
12/27/2007US20070297230 Non-volatile memory structure
12/27/2007DE10318771B4 Integrierte Speicherschaltung mit einer Redundanzschaltung sowie ein Verfahren zum Ersetzen eines Speicherbereichs An integrated circuit memory having a redundancy circuit and a method for replacing a memory area
12/27/2007DE102006028483A1 Memory accessing method involves accessing memory cell arranged in cell field elements of memory and address of relevant cell field elements lies at activation device of memory
12/27/2007DE102005004379B4 Speicherbauelement und Verfahren zum Testen von Speicherbauelementen mit reparaturfähiger Redundanz Memory device and method for testing memory devices with redundancy repairable
12/26/2007EP1869543A1 Method and system for storing logical data blocks into flash-blocks in multiple non-volatile memories which are connected to at least one common data i/o bus
12/26/2007CN101095060A Adaptive memory calibration using bins
12/26/2007CN100358048C Semiconductor memory capable of realizing redundant unit array correct alternation
12/25/2007US7313749 System and method for applying error correction code (ECC) erasure mode and clearing recorded information from a page deallocation table
12/25/2007US7313741 Integrated semiconductor memory
12/25/2007US7313740 Internally generating patterns for testing in an integrated circuit device
12/25/2007US7313739 Method and apparatus for testing embedded cores
12/25/2007US7313733 System and method of improving memory yield in frame buffer memory using failing memory location
12/25/2007US7313732 Memory arrangement in a computer system
12/25/2007US7313723 Self-reparable semiconductor and method thereof
12/25/2007US7313048 Reset detection circuit in semiconductor integrated circuit
12/25/2007US7313039 Method for analyzing defect of SRAM cell
12/25/2007US7313037 RFID system including a memory for correcting a fail cell and method for correcting a fail cell using the same
12/25/2007US7313035 Methods and apparatus for improved memory access
12/25/2007US7313022 Non-volatile semiconductor memory
12/25/2007US7312109 Methods for fabricating fuse programmable three dimensional integrated circuits
12/23/2007CA2585094A1 Software and methods to detect and correct data structure
12/21/2007WO2007146849A1 Transparent test method and scan flip-flop
12/21/2007WO2006104584A3 Memory having a portion that can be switched between use as data and use as error correction code (ecc)
12/20/2007US20070294609 Recording medium, recording method and apparatus, reproducing method and apparatus, data transmitting method, and data decrypting method
12/20/2007US20070294608 Plasma process power delivery system and method with event-controlled data storage
12/20/2007US20070294462 Memory device including self-id information
12/20/2007US20070291563 Method and apparatus for improving yield in semiconductor devices by guaranteeing health of redundancy information
12/20/2007US20070291562 Internally asymmetric methods and circuits for evaluating static memory cell dynamic stability
12/20/2007US20070291560 Method and system for improving reliability of memory device
12/19/2007CN101091223A Bias application method of storage and storage
12/19/2007CN101090000A Memory and its redundant repair method
12/19/2007CN101089999A 半导体存储装置 The semiconductor memory device
12/19/2007CN101089824A Method for solving failure problem of self testing built-in central process unit
12/19/2007CN100356543C Semiconductor device and method for producing the same
12/19/2007CN100356481C Test device for masiac storage
12/19/2007CN100356479C Nonvolatile semiconductor storage equipment providing suitable programming voltage
12/19/2007CN100356337C Data detection system and method of read only memory in basic input/output system
12/18/2007US7310764 Digital video disk and player and associated methods with proprietary format
12/18/2007US7310757 Error detection on programmable logic resources
12/18/2007US7310753 Internal signal test device and method thereof
12/18/2007US7310752 System and method for on-board timing margin testing of memory modules
12/18/2007US7310748 Memory hub tester interface and method for use thereof
12/18/2007US7310648 System for compression of physiological signals
12/18/2007US7310278 Method and apparatus for in-system redundant array repair on integrated circuits
12/18/2007US7310259 Access circuit and method for allowing external test voltage to be applied to isolated wells
12/13/2007WO2006124428A3 Apparatus and method for channel interleaving in communications system
12/13/2007US20070288830 Information processing system, information processing device, information processing method, and program
12/13/2007US20070288817 Semiconductor integrated circuit and a method of testing the same
12/13/2007US20070288812 Parallel bit test circuit and method for semiconductor memory device
12/13/2007US20070288811 System and method for testing a data storage device without revealing memory content
12/13/2007US20070288810 Semiconductor memory, and testing method thereof
12/13/2007US20070288809 Method for updating nonvolatile memory