Patents
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
06/2007
06/13/2007CN1979687A Full detecting method for inlaid flash memory of simplified base pin
06/13/2007CN1979686A Safety detecting method for system integrated chip with built-in non-volatile memory
06/13/2007CN1979685A Method for detecting system intelegrated chip with built-in multiple blook of non-volatile memory
06/13/2007CN1979680A Information reading apparatus, method and corresponding medium
06/12/2007US7231585 Error correction for flash memory
06/12/2007US7231582 Method and system to encode and decode wide data words
06/12/2007US7231580 Nonvolatile memory apparatus and data processing system
06/12/2007US7231573 Delay management system
06/12/2007US7231564 Data block location verification
06/12/2007US7231563 Method and apparatus for high speed testing of latch based random access memory
06/12/2007US7231562 Memory module, test system and method for testing one or a plurality of memory modules
06/12/2007US7231552 Method and apparatus for independent control of devices under test connected in parallel
06/12/2007US7230872 Efficent column redundancy techniques
06/12/2007US7230861 Semiconductor integrated circuit
06/12/2007US7230859 Nonvolatile memory
06/12/2007US7230852 Non-volatile semiconductor memory device allowing efficient programming operation and erasing operation in short period of time
06/12/2007US7230442 Semi-conductor component testing process and system for testing semi-conductor components
06/12/2007US7229858 Semiconductor wafer and semiconductor device manufacturing method using the same
06/07/2007WO2007065155A2 Rewrite strategy and methods and systems for error correction in high-density recording
06/07/2007WO2007063784A1 Semiconductor memory test apparatus with error classification means and related test method
06/07/2007US20070130496 Apparatus, method and computer program product for reading information stored in storage medium, and storage medium for storing information based on charge amount
06/07/2007US20070130488 Semiconductor device and data storage apparatus
06/07/2007US20070127300 Bun-in test method semiconductor memory device
06/07/2007US20070127280 Deterministic addressing of nanoscale devices assembled at sublithographic pitches
06/06/2007EP1606824B1 Test for weak sram cells
06/06/2007EP1563512B1 2t2c signal margin test mode using resistive element
06/06/2007EP1377981B1 Method and system to optimize test cost and disable defects for scan and bist memories
06/06/2007EP1214713B1 Architecture, method(s) and circuitry for low power memories
06/06/2007CN1975935A External storing performance testing method and apparatus
06/06/2007CN1975934A A semiconductor integlated circuit having test function and manufacturing method
06/06/2007CN1320650C Semiconductor device, system device using it, and manufacturing method of a semiconductor device
06/06/2007CN1320621C Delay time insertion based on event testing system
06/05/2007US7228487 Data buffering system and method for optical recording device
06/05/2007US7228477 Apparatus and method for testing circuit units to be tested
06/05/2007US7228473 Integrated module having a plurality of separate substrates
06/05/2007US7228471 System and method for testing a data storage device without revealing memory content
06/05/2007US7228470 Semiconductor testing circuit, semiconductor storage device, and semiconductor testing method
06/05/2007US7228469 Portable information device, method for recovering data in portable information device, and computer product
06/05/2007US7228468 Method and apparatus of build-in self-diagnosis and repair in a memory with syndrome identification
06/05/2007US7228467 Correcting data having more data blocks with errors than redundancy blocks
06/05/2007US7228381 Storage system using fast storage device for storing redundant data
06/05/2007US7228262 Semiconductor integrated circuit verification system
06/05/2007US7227801 Semiconductor memory device with reliable fuse circuit
06/05/2007US7227785 Memory devices with page buffer having dual registers and method of using the same
06/05/2007US7227774 MRAM integrated circuits, MRAM circuits, and systems for testing MRAM integrated circuits
06/05/2007US7227733 Method and apparatus providing final test and trimming for a power supply controller
06/05/2007US7227351 Apparatus and method for performing parallel test on integrated circuit devices
06/05/2007US7227221 Multiple bit chalcogenide storage device
06/05/2007US7227170 Multiple bit chalcogenide storage device
05/2007
05/31/2007WO2007060763A1 Semiconductor device
05/31/2007WO2007060738A1 Semiconductor device
05/31/2007WO2006124244A3 Redundant column read in a memory array
05/31/2007WO2006057793A3 Predictive error correction code generation facilitating high-speed byte-write in a semiconductor memory
05/31/2007WO2006007264A3 Simultaneous external read operation during internal programming in a flash memory device
05/31/2007US20070124650 Disk controller
05/31/2007US20070124649 Signal processing apparatus, signal processing method and storage system
05/31/2007US20070124648 Data protection method
05/31/2007US20070124647 Method and system for a non-volatile memory with multiple bits error correction and detection for improving production yield
05/31/2007US20070124630 Semiconductor device having adaptive power function
05/31/2007US20070124629 Embedded testing circuit for testing a dual port memory
05/31/2007US20070124628 Methods of memory bitmap verification for finished product
05/31/2007US20070121397 Output circuit, semiconductor memory device having the same, and method of expanding a valid output data window
05/31/2007US20070121396 Semiconductor memory device and method for operating a semiconductor memory device
05/31/2007US20070120237 Semiconductor integrated circuit
05/31/2007US20070120202 Semiconductor Integrated Circuit Device and Method of Testing the Same
05/31/2007US20070120125 Semiconductor Integrated Circuit Device and Method of Testing the Same
05/31/2007DE19952272B4 Verfahren und System zum Prüfen von auf eingebetteten Bausteinen basierenden integrierten Systemchip-Schaltungen Method and system for testing based on embedded devices integrated system chip circuits
05/31/2007DE102006054161A1 Eingebettete Testschaltung zum Testen eines Dual-Port-Speichers Embedded test circuit for testing a dual-port memory
05/31/2007DE102005056930A1 Halbleiter-Bauelement-Test-Verfahren, Halbleiter-Bauelement-Testgerät, sowie zwischen ein Testgerät und ein zu testendes Halbleiter-Bauelement geschaltete Einrichtung A semiconductor device testing method, semiconductor device tester as well as connected between a test apparatus and a semiconductor device to be tested device
05/31/2007DE102005056279A1 Test-Vorrichtung und Verfahren zum Testen von elektronischen Bauelementen Test Apparatus and method for testing electronic components
05/30/2007EP1791133A1 A method of sharing testing components for multiple embedded memories and the memory system incorporating the same
05/30/2007CN1973334A Non-volatile memory and method with control data management
05/30/2007CN1971763A Self-examining device and method of ROM
05/30/2007CN1971758A Data carrier system and data saving/restoring method thereof
05/30/2007CN1319150C Observable register transmission stage covering analyzing and excitation producing method
05/30/2007CN1319072C Memory module and memory component with built-in self test function and related testing method
05/30/2007CN1318972C Method, system and high-speed storage for autonomous error recovery for memory devices
05/29/2007US7225390 Semiconductor memory device provided with error correcting code circuitry
05/29/2007US7225379 Circuit and method for testing semiconductor device
05/29/2007US7225375 Method and apparatus for detecting array degradation and logic degradation
05/29/2007US7225372 Testing board for semiconductor memory, method of testing semiconductor memory and method of manufacturing semiconductor memory
05/29/2007US7225371 Method and apparatus for storing and retrieving multiple point-in-time consistent data sets
05/29/2007US7225311 Method and apparatus for coordinating memory operations among diversely-located memory components
05/29/2007US7225292 Memory module with termination component
05/29/2007US7224627 Integrated semiconductor circuit and method for testing the same
05/29/2007US7224597 Ferroelectric memory device, electronic apparatus
05/29/2007US7223696 Methods for maskless lithography
05/24/2007WO2007058624A1 A controller for non-volatile memories, and methods of operating the memory controller
05/24/2007WO2007011677B1 Apparatus, system and method for accessing persistent files in non-execute-in-place flash memory
05/24/2007WO2006057794A3 Transparent error correcting memory that supports partial-word write
05/24/2007US20070118789 Decoding device in optical disc drive and related decoding method thereof
05/24/2007US20070115736 Semiconductor memory device having a single input terminal to select a buffer and method of testing the same
05/24/2007US20070115735 Semiconductor integrated circuits and test methods thereof
05/24/2007US20070115734 Method of operating an integrated circuit tester employing a float-to-ratio conversion with denominator limiting
05/24/2007DE19808988B4 Target-Eingabe/Ausgabesystem zum Koppeln eines auf Hardwarelogik basierenden Emulators an ein Target-System Target input / output system for coupling a hardware-based logic emulator to a target system
05/24/2007DE102005046588A1 Vorrichtung und Verfahren zum Test und zur Diagnose digitaler Schaltungen Apparatus and method for testing and diagnosis of digital circuits
05/23/2007EP1254461B1 Testable rom chip for a data memory redundant logic
05/23/2007CN1968026A Semiconductor integrated circuits and test methods thereof
05/23/2007CN1967723A Self-testing IC based on 3D memorizer
05/22/2007US7222282 Embedded micro computer unit (MCU) for high-speed testing using a memory emulation module and a method of testing the same