Patents
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
06/2008
06/05/2008US20080130386 Circuit and method for testing multi-device systems
06/05/2008US20080130385 Method and system for in-situ parametric SRAM diagnosis
06/05/2008DE102006056560A1 Parameter's e.g. reference voltage, target value determining method for e.g. dynamic RAM, involves determining target values for parameter to be trimmed for respective temperatures, where values and temperatures differ from each other
06/05/2008DE102004032707B4 Datenträger und Verfahren zum Testen eines Datenträgers Data carriers and method for testing a data carrier
06/04/2008EP1927203A2 Strobe technique for test of digital signal timing
06/04/2008EP1620859B1 Reference current generator, and method of programming, adjusting and/or operating same
06/04/2008CN201069658Y Memory testing device
06/04/2008CN101191815A Circuit of detecting power-up and power-down
06/04/2008CN100392766C Reducing memory failures in integrated circuits
06/04/2008CN100392762C Method and circuit for transmitting address information
06/04/2008CN100392610C A high reliability memory module with a fault tolerant address and command bus
06/03/2008US7383492 First-in/first-out (FIFO) information protection and error detection method and apparatus
06/03/2008US7383476 System architecture and method for three-dimensional memory
06/03/2008US7383475 Design structure for memory array repair where repair logic cannot operate at same operating condition as array
06/03/2008US7382674 Static random access memory (SRAM) with clamped source potential in standby mode
06/03/2008US7382671 Method for detecting column fail by controlling sense amplifier of memory device
06/03/2008US7382389 Methods and systems for thermal-based laser processing a multi-material device
06/03/2008US7382152 I/O interface circuit of integrated circuit
06/03/2008US7381575 Device and method for detecting alignment of active areas and memory cell structures in DRAM devices
05/2008
05/29/2008US20080126913 Methods and systems for managing corrupted meta-data in a computer system or network
05/29/2008US20080126911 Memory wrap test mode using functional read/write buffers
05/29/2008US20080126894 Semiconductor integrated circuit which properly executes an operational test of a circuit under test in the semiconductor integrated circuit
05/29/2008US20080126893 Method of refreshing a dynamic random access memory and corresponding dynamic random access memory device, in particular incorporated into a cellular mobile telephone
05/29/2008US20080126892 Locally synchronous shared BIST architecture for testing embedded memories with asynchronous interfaces
05/29/2008US20080126890 Autonomic Parity Exchange
05/29/2008US20080126863 Testing DRAM Chips with a PC Motherboard Attached to a Chip Handler by a Solder-Side Adaptor Board with an Advanced-Memory Buffer (AMB)
05/29/2008DE102007049002A1 Verfahren und Vorrichtung zur Vergrösserung von Taktfrequenz und Datenrate für Halbleiterbausteine Method and apparatus for Enlargement of clock frequency and data rate for semiconductor devices
05/29/2008DE102007046954A1 Steuerung der Spannungsversorgung einer Speicherzelle aufgrund von Fehlerermittlung Controlling the voltage supply of a memory cell due to error detection
05/29/2008DE10154648B4 Subwortleitungstreiber Subwortleitungstreiber
05/28/2008EP1924914A2 Data processing system and a method for the operation thereof
05/28/2008EP1815339A4 Transparent error correcting memory that supports partial-word write
05/28/2008EP1815338A4 Predictive error correction code generation facilitating high-speed byte-write in a semiconductor memory
05/28/2008CN101189683A Method and apparatus for programming a memory array
05/28/2008CN100390904C Method and device for testing semiconductor memory
05/28/2008CN100390903C Semiconductor memory device and method for correcting memory cell data
05/28/2008CN100390557C Integrated circuit with embedded identification code
05/27/2008US7380200 Soft error detection and correction by 2-dimensional parity
05/27/2008US7380198 System and method for detecting write errors in a storage device
05/27/2008US7380183 Semiconductor circuit apparatus and scan test method for semiconductor circuit
05/27/2008US7380182 Method and apparatus for checking output signals of an integrated circuit
05/27/2008US7380180 Method, system, and apparatus for tracking defective cache lines
05/27/2008US7380179 High reliability memory module with a fault tolerant address and command bus
05/27/2008US7379412 Methods for writing and reading highly resolved domains for high density data storage
05/27/2008US7379379 Storage device employing a flash memory
05/27/2008US7379366 Thin film magnetic memory device capable of conducting stable data read and write operations
05/27/2008US7379361 Fully-buffered memory-module with redundant memory buffer in serializing advanced-memory buffer (AMB) for repairing DRAM
05/27/2008US7379359 Nonvolatile semiconductor memory
05/27/2008US7379357 Semiconductor memory device having advanced repair circuit
05/27/2008US7379349 Simultaneous and selective memory macro testing
05/27/2008US7379332 Systems-on-chips including programmed memory cells and programmable and erasable memory cells
05/27/2008US7378863 Synchronous semiconductor device, and inspection system and method for the same
05/22/2008WO2008024688A3 Method, apparatus and system relating to automatic cell threshold voltage measurement
05/22/2008US20080120059 Test apparatus and test method
05/22/2008US20080118229 ITERATIVE CODE SYSTEM FOR STREAMING HDDs
05/22/2008US20080117697 System that prevents reduction in data retention
05/22/2008US20080117696 Method for repairing defects in memory and related memory system
05/22/2008US20080117692 Semiconductor memory device having the operating voltage of the memory cell controlled
05/22/2008US20080117681 Detection and correction of defects in semiconductor memories
05/21/2008EP1738375B1 Method for detecting resistive-open defects in semiconductor memories
05/21/2008CN101183565A Data verification method for storage medium
05/21/2008CN101183564A System that prevents reduction in data retention
05/21/2008CN101183563A Memory system including flash memory and method of operating the same
05/21/2008CN101183550A Write-once type optical disc, and method and apparatus for managing defective areas on write-once type optical disc
05/20/2008US7376888 Interleaved recording of separated error correction encoded information
05/20/2008US7376887 Method for fast ECC memory testing by software including ECC check byte
05/20/2008US7376886 Method and related apparatus for data error checking
05/20/2008US7376872 Testing embedded memory in integrated circuits such as programmable logic devices
05/20/2008US7376871 CAM test structures and methods therefor
05/20/2008US7376857 Method of timing calibration using slower data rate pattern
05/20/2008US7376026 Integrated semiconductor memory having sense amplifiers selectively activated at different timing
05/20/2008US7376010 Nonvolatile semiconductor memory device having protection function for each memory block
05/20/2008US7376003 Magnetic random access memory
05/15/2008US20080115043 Semiconductor memory system and signal processing system
05/15/2008US20080115039 Destination indication to aid in posted write buffer loading
05/15/2008US20080115017 Detection and correction of block-level data corruption in fault-tolerant data-storage systems
05/15/2008US20080112242 Multichip and method of testing the same
05/15/2008US20080112241 Integrated circuit device
05/15/2008US20080112240 Memory device and method of repairing the same
05/15/2008US20080112239 Repair fuse circuit for storing i/o repair information therein
05/15/2008US20080112238 Hybrid flash memory device and method for assigning reserved blocks thereof
05/15/2008US20080112237 Method and Enhanced SRAM Redundancy Circuit for Reducing Wiring and Required Number of Redundant Elements
05/15/2008US20080112205 Circuit and method for patching for program ROM
05/15/2008DE60035915T2 Einrichtung und Verfahren zur Prüfung eines nichtflüchtigen wiederprogrammierbaren Speichers Apparatus and method for testing a non-volatile reprogrammable memory
05/15/2008DE102007051061A1 Nonvolatile semiconductor memory system for use in e.g. cellular telephone, has memory array with multi-bit memory cells, and memory controller with repair unit repairing bit error in i-bit data stored in repair memory
05/15/2008DE102006027448B4 Schaltungsanordnung Circuitry
05/15/2008DE102004027854B4 Testvorrichtung und Verfahren zum Testen von zu testenden Schaltungseinheiten A test device and method for testing the circuit under test units
05/14/2008CN101178943A Memory and method for reading error detection thereof
05/14/2008CN101178942A Abrasion wear process method and device of data block
05/14/2008CN101178941A Method for dynamically estimating memory body characteristic ineffective cause of defect
05/13/2008US7373583 ECC flag for testing on-chip error correction circuit
05/13/2008US7373564 Semiconductor memory
05/13/2008US7373562 Memory circuit comprising redundant memory areas
05/13/2008US7373547 Self-reparable semiconductor and method thereof
05/13/2008US7372761 Semiconductor device, nonvolatile semiconductor memory, system including a plurality of semiconductor devices or nonvolatile semiconductor memories, electric card including semiconductor device or nonvolatile semiconductor memory, and electric device with which this electric card can be used
05/13/2008US7372751 Using redundant memory for extra features
05/13/2008US7372750 Integrated memory circuit and method for repairing a single bit error
05/13/2008US7372251 Semiconductor integrated circuit and memory test method
05/08/2008US20080109706 Error correction method and apparatus for optical information storage medium recording/reproducing apparatus
05/08/2008US20080109705 Memory system and method using ECC with flag bit to identify modified data
05/08/2008US20080109704 Data allocation in memory chips
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