Patents
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
04/2008
04/02/2008CN101156129A Method and system for storing logical data blocks into flash-blocks in multiple non-volatile memories which are connected to at least one common data i/o bus
04/02/2008CN101154626A Method of identifying and/or programming an integrated circuit
04/02/2008CN101154469A Semiconductor device
04/02/2008CN101154468A Test method for embedded memory chip
04/02/2008CN101154465A Nonvolatile semiconductor memory device
04/02/2008CN101154461A Nonvolatile semiconductor memory device
04/02/2008CN101154459A Nonvolatile semiconductor memory device
04/02/2008CN101154448A Page buffer circuit of memory device and program method
04/02/2008CN101154444A Method of programming a phase change memory device
04/02/2008CN100378704C Method and apparatus for optimizing timing for a multi-drop bus
04/01/2008US7353442 On-chip and at-speed tester for testing and characterization of different types of memories
04/01/2008US7353438 Transparent error correcting memory
04/01/2008US7353437 System and method for testing a memory for a memory failure exhibited by a failing memory
04/01/2008US7353424 Storage device, data processing system and data writing and readout method
04/01/2008US7353400 Secure program execution depending on predictable error correction
04/01/2008US7353328 Memory testing
04/01/2008US7352639 Method and apparatus for increasing yield in a memory circuit
04/01/2008US7352620 Non-volatile semiconductor device and method for automatically recovering erase failure in the device
04/01/2008US7352199 Memory card with enhanced testability and methods of making and using the same
03/2008
03/27/2008US20080077842 Memory with Cell Population Distribution Assisted Read Margining
03/27/2008US20080077841 Methods of Cell Population Distribution Assisted Read Margining
03/27/2008US20080077840 Memory system and method for storing and correcting data
03/27/2008US20080077831 Semiconductor integrated circuit, BIST circuit, design program of BIST circuit, design device of BIST circuit and test method of memory
03/27/2008US20080077830 Internal signal monitoring device in semiconductor memory device and method for monitoring the same
03/27/2008US20080077829 Systems and Methods for Generating Erasure Flags
03/27/2008US20080077827 Test method for semiconductor device
03/27/2008US20080077349 Semiconductor testing device
03/27/2008US20080074941 Semiconductor Device, Nonvolatile Semiconductor Memory, System Including A Plurality Of Semiconductor Devices Or Nonvolatile Semiconductor Memories, Electric Card Including Semiconductor Device Or Nonvolatile Semiconductor Memory, And Electric Device With Which This Electric Card Can Be Used
03/27/2008US20080074938 Semiconductor memory and testing method of same
03/27/2008US20080074925 Nonvolatile memory device including circuit formed of thin film transistors
03/27/2008DE102004015269B4 Integrierte Schaltung zur Ermittelung einer Spannung An integrated circuit for determining a voltage
03/27/2008DE10136700B4 Verfahren zum Testen einer zu testenden Schaltungseinheit und Testvorrichtung A method of testing a circuit under test unit and test device
03/27/2008DE10041688B4 Integrierter Speicher mit Speicherzellen in mehreren Speicherzellenblöcken und Verfahren zum Betrieb eines solchen Speichers Integrated memory having memory cells in a plurality of memory cell blocks and method for operating such a memory,
03/26/2008EP1903578A1 Semiconductor memory device and method of controlling timing
03/26/2008CN101149977A Voltage monitoring device in semiconductor memory device
03/26/2008CN101149976A Internal signal monitoring device in semiconductor memory device and method for monitoring the same
03/26/2008CN101149664A Solid state hard disc and method for processing its management data
03/26/2008CN100377302C Semiconductor device producing system and method
03/26/2008CN100377260C Dynamic memory and method for testing dynamic memory
03/25/2008US7350137 Method and circuit for error correction in CAM cells
03/25/2008US7350135 Checksum writing method and checksum checking apparatus
03/25/2008US7350134 Method and apparatus of reloading erroneous configuration data frames during configuration of programmable logic devices
03/25/2008US7350120 Buffered memory module and method for testing same
03/25/2008US7350119 Compressed encoding for repair
03/25/2008US7350109 System and method for testing a memory using DMA
03/25/2008US7350010 Method and an apparatus for switching root cells for a computer system without requiring the computer system to be re-booted
03/25/2008US7349278 DRAM and method for partially refreshing memory cell array
03/25/2008US7349273 Access circuit and method for allowing external test voltage to be applied to isolated wells
03/25/2008US7348789 Integrated circuit device with on-chip setup/hold measuring circuit
03/25/2008US7348595 Semiconductor wiring substrate, semiconductor device, method for testing semiconductor device, and method for mounting semiconductor device
03/20/2008WO2008033679A2 Non-volatile memory and method for reduced erase/write cycling during trimming of initial programming voltage
03/20/2008US20080072120 Variable Strength ECC
03/20/2008US20080072119 Allowable bit errors per sector in memory devices
03/20/2008US20080072118 Yield-Enhancing Device Failure Analysis
03/20/2008US20080072117 Programming a memory device having error correction logic
03/20/2008US20080070330 Fabrication method of semiconductor integrated circuit device
03/20/2008US20080068918 Semiconductor memory device capable of relieving defective bits found after packaging
03/20/2008US20080068916 Semiconductor memory device
03/20/2008US20080068906 Method and apparatus for testing a memory device
03/20/2008US20080068905 Reparable semiconductor memory device
03/20/2008DE102006040821A1 Integrated circuit testing method for semiconductor substrate, involves evaluating determined value of comparison signal based on parameter, and outputting error signal if determined value does not correspond to parameter
03/19/2008EP1901309A1 Method of fixing read evaluation time in a non volatile nand type memory device
03/19/2008EP1900104A2 Apparatus and method for channel interleaving in communications system
03/19/2008CN101147206A Test device and test method
03/19/2008CN101147205A Testing apparatus and testing method
03/19/2008CN101147204A Tester and selector
03/19/2008CN101145575A Non-volatile memory unit and array
03/19/2008CN101145402A Flash memory card test device and method
03/19/2008CN101145401A Semiconductor memory device, memory system having semiconductor memory device, and method for testing memory system
03/19/2008CN101145400A Embedded memory SOC mapping realization method
03/19/2008CN101145136A Processor memory array having memory macros and its protecting method
03/18/2008US7346831 Parity assignment technique for parity declustering in a parity array of a storage system
03/18/2008US7346830 Usage of an SDRAM as storage for correction and track buffering in frontend ICs of optical recording or reproduction devices
03/18/2008US7346829 Semiconductor device and testing method for same
03/18/2008US7346818 Method and apparatus for redundant location addressing using data compression
03/18/2008US7346817 Method and apparatus for generating and detecting initialization patterns for high speed DRAM systems
03/18/2008US7346816 Method and system for testing memory using hash algorithm
03/18/2008US7346815 Mechanism for implementing redundancy to mask failing SRAM
03/18/2008US7346789 Multimedia reproducing apparatus having function for efficient use of memory
03/18/2008US7346712 Semiconductor integrated circuit apparatus and circuit board and information readout method
03/18/2008US7345935 Semiconductor wafer and method for testing ferroelectric memory device
03/18/2008US7345516 Apparatus and method for adjusting slew rate in semiconductor memory device
03/13/2008WO2008029457A1 Nonvolatile memory
03/13/2008WO2008029434A1 Semiconductor storage device and semiconductor storage device test method
03/13/2008WO2008028853A1 Circuit configuration, and method for the operation of a circuit configuration
03/13/2008US20080065938 System, method and storage medium for testing a memory module
03/13/2008US20080065937 Nand flash memory device with ecc protected reserved area for non-volatile storage of redundancy data
03/13/2008US20080062789 Memory diagnosis test circuit and test method using the same
03/13/2008US20080062788 Parallel bit test circuit and method
03/13/2008US20080062787 Method of detecting bit line bridge by selectively floating even-or odd-numbered bit lines of memory device
03/13/2008US20080062786 Apparatus and method for providing atomicity with respect to request of write operation for successive sector
03/13/2008US20080062785 Non-Volatile Memory With Reduced Erase/Write Cycling During Trimming of Initial Programming Voltage
03/13/2008US20080062784 Semiconductor memory
03/13/2008US20080062783 Design structure for in-system redundant array repair in integrated circuits
03/13/2008US20080062770 Non-Volatile Memory With Linear Estimation of Initial Programming Voltage
03/13/2008US20080062761 Defective block isolation in a non-volatile memory system
03/13/2008US20080062746 SRAM static noise margin test structure suitable for on chip parametric measurements
03/13/2008US20080062741 Phase change random access memory and method of testing the same
03/13/2008DE102006040644A1 Korrekturverfahren für einen neu-programmierbaren Mikroprozessor Correction method for a new programmable microprocessor
03/13/2008DE102006019426B4 Speichermodulsteuerung, Speichersteuerung und entsprechende Speicheranordnung sowie Verfahren zur Fehlerkorrektur Memory module controller, memory controller and respective memory device and method for error correction