| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 09/26/2007 | EP1837881A1 Redundancy-function-equipped semiconductor memory device from ECC memory |
| 09/26/2007 | CN101042939A Semiconductor apparatus and test method therefor |
| 09/26/2007 | CN101042938A Redundancy-function-equipped semiconductor memory device made from ecc memory |
| 09/26/2007 | CN101042936A Programmable non-volatile memory device to reduce programmable threshold edge and method for testing the same |
| 09/26/2007 | CN101042931A Semiconductor storage device |
| 09/26/2007 | CN101042928A 半导体存储装置 The semiconductor memory device |
| 09/26/2007 | CN100339816C Disk array system for suppressing disk fault |
| 09/25/2007 | US7275202 Method, system and program product for autonomous error recovery for memory devices |
| 09/25/2007 | US7275200 Transparent error correcting memory that supports partial-word write |
| 09/25/2007 | US7275199 Method and apparatus for a modified parity check |
| 09/25/2007 | US7275196 Runtime reconfiguration of reconfigurable circuits |
| 09/25/2007 | US7275190 Memory block quality identification in a memory device |
| 09/25/2007 | US7275189 Memory module and method for operating a memory module in a data memory system |
| 09/25/2007 | US7275188 Method and apparatus for burn-in of semiconductor devices |
| 09/25/2007 | US7275187 Test circuit for memory |
| 09/25/2007 | US7275186 Memory bus checking procedure |
| 09/25/2007 | US7275173 Method for measuring and compensating for skews of data transmission lines by compensating for skew by delay elements switched in response to the calculated reative skew |
| 09/25/2007 | US7274611 Method and architecture to calibrate read operations in synchronous flash memory |
| 09/25/2007 | US7274609 High speed redundant data sensing method and apparatus |
| 09/25/2007 | US7274580 Content addressable memory device |
| 09/25/2007 | US7274208 Nanoscale wire-based sublithographic programmable logic arrays |
| 09/20/2007 | WO2007104355A1 Format transformation of test data |
| 09/20/2007 | WO2007090772A3 Circuit and testing device |
| 09/20/2007 | US20070220402 Auxiliary storage device and read/write method |
| 09/20/2007 | US20070220401 Systems, methods, and apparatuses for using the same memory type to support an error check mode and a non-error check mode |
| 09/20/2007 | US20070220400 Semiconductor memory device |
| 09/20/2007 | US20070220379 Memory device fail summary data reduction for improved redundancy analysis |
| 09/20/2007 | US20070220378 Method and apparatus for testing data steering logic for data storage having independently addressable subunits |
| 09/20/2007 | US20070217276 Fuse latch circuit, semiconductor device and semiconductor memory system |
| 09/20/2007 | US20070217274 Nonvolatile memory system and method for controlling nonvolatile memory |
| 09/20/2007 | US20070217273 Phase-change random access memory |
| 09/20/2007 | US20070215820 Methods and systems for thermal-based laser processing a multi-material device |
| 09/20/2007 | DE102006011706A1 Semiconductor component e.g. static RAM, testing method, involves transmitting test-signal applied to terminal of component to another terminal of component instead of switching core during test operating mode of component |
| 09/20/2007 | DE102006011705A1 System und Verfahren zum Testen eines integrierten Schaltkreises System and method for testing an integrated circuit |
| 09/19/2007 | EP1834337A1 Sram test method and sram test arrangement to detect weak cells |
| 09/19/2007 | EP1668671A4 Apparatus and method for selectively configuring a memory device using a bi-stable relay |
| 09/19/2007 | CN101040445A Error protecting groups of data words |
| 09/19/2007 | CN100338686C Nonvolatile semiconductor memory with raised probability of redundant remedy |
| 09/19/2007 | CN100338681C Thin film magnetic memory device having redundant configuration |
| 09/18/2007 | US7272776 Master data quality |
| 09/18/2007 | US7272775 Memory circuit comprising an error correcting code |
| 09/18/2007 | US7272774 Extender card for testing error-correction-code (ECC) storage area on memory modules |
| 09/18/2007 | US7272773 Cache directory array recovery mechanism to support special ECC stuck bit matrix |
| 09/18/2007 | US7272758 Defective memory block identification in a memory device |
| 09/18/2007 | US7272757 Method for testing a memory chip and test arrangement |
| 09/18/2007 | US7272057 Memory apparatus |
| 09/13/2007 | WO2007103748A1 Dual-path, multimode sequential storage element |
| 09/13/2007 | WO2007103220A2 Calibration system for writing and reading multiple states into phase change memory |
| 09/13/2007 | US20070211559 Computer system with nand flash memory for booting and storage |
| 09/13/2007 | US20070211546 Apparatus and method for controlling test mode of semiconductor memory |
| 09/13/2007 | DE10248047B4 Halbleiterspeichervorrichtung mit unterteilter Wortleitungsstruktur A semiconductor memory device having a split word line structure |
| 09/13/2007 | DE102007008180A1 Halbleiterspeicherelement, Speichersystem und Daten-Sende-/Empfangssystem The semiconductor memory device, storage system and data transmission / reception system |
| 09/13/2007 | CA2641354A1 At-speed multi-port memory array test method and apparatus |
| 09/12/2007 | EP1833059A1 Memory device fail summary data reduction for improved redundancy analysis |
| 09/12/2007 | EP1665286B8 Integrated circuit and a method of cache remapping |
| 09/12/2007 | CN101036131A Memory transaction burst operation and memory components supporting temporally multiplexed error correction coding |
| 09/12/2007 | CN101034372A Nonvolatile memory system and management method for nonvolatile memory |
| 09/12/2007 | CN100337285C A system for simulating physical damage of NAND flash memory and method thereof |
| 09/12/2007 | CN100337283C Semiconductor storage device |
| 09/11/2007 | US7269780 Power management for circuits with inactive state data save and restore scan chain |
| 09/11/2007 | US7269779 Data reproducing method and data reproducing apparatus |
| 09/11/2007 | US7269768 Method and system to provide debugging of a computer system from firmware |
| 09/11/2007 | US7269767 Magnetic disk apparatus, preventive maintenance detection method and program therefor |
| 09/11/2007 | US7269766 Method and apparatus for memory self testing |
| 09/11/2007 | US7269765 Method and apparatus for storing failing part locations in a module |
| 09/11/2007 | US7269759 Data processing apparatus and method for handling corrupted data values |
| 09/11/2007 | US7269687 Bounding defective regions of a tape storage medium |
| 09/11/2007 | US7269087 Semiconductor memory device |
| 09/11/2007 | US7269083 Using redundant memory for extra features |
| 09/11/2007 | US7269043 Memory module and impedance calibration method of semiconductor memory device |
| 09/11/2007 | US7268602 Method and apparatus for accommodating delay variations among multiple signals |
| 09/11/2007 | US7268531 Apparatus for improving stability and lock time for synchronous circuits |
| 09/11/2007 | US7268516 Circuit for use with switched reluctance machines |
| 09/07/2007 | WO2007099666A1 Semiconductor integrated circuit, inspection program verification method, and method for verifying remedy result by redundant memory cell |
| 09/07/2007 | WO2007099579A1 Ram macro and timing generating circuit for same |
| 09/07/2007 | WO2007034481A3 A nand flash memory controller exporting a nand interface |
| 09/06/2007 | US20070208989 System and method of utilizing a network to correct flawed media data |
| 09/06/2007 | US20070208969 Testing apparatus and testing method |
| 09/06/2007 | US20070208968 At-speed multi-port memory array test method and apparatus |
| 09/06/2007 | US20070208967 Accessing sequential data in microcontrollers |
| 09/06/2007 | US20070208966 Test circuit for semiconductor device |
| 09/06/2007 | US20070206473 Data recording method for optical disk drive |
| 09/06/2007 | US20070206430 Semiconductor memory device and test method therefor |
| 09/06/2007 | US20070206418 Nonvolatile memory |
| 09/06/2007 | US20070206412 Semiconductor device |
| 09/06/2007 | DE112005001371T5 Verfahren und Vorrichtung zur Kopplung zwischen einem Testsystem und einem eingebetteten Speicher für einen Testmodussetzvorgang Method and device for coupling between a test system and an embedded memory for a test mode setting process |
| 09/06/2007 | DE102006007993A1 Test auxiliary device for e.g. dynamic random access memory-component, has number of two-way-switches provided for selection between two elementary test samples of test data bits and for setting selected test data bits at data bus |
| 09/05/2007 | EP1830366A1 Bias application method of storage and storage |
| 09/05/2007 | EP1830241A1 Integrated circuit I/O using a high performance bus interface |
| 09/05/2007 | EP1829049A1 Erased sector detection mechanisms |
| 09/05/2007 | EP1556868B1 Automated wear leveling in non-volatile storage systems |
| 09/05/2007 | CN101032016A Semiconductor device and semiconductor device testing method |
| 09/05/2007 | CN101031971A Data storage and replay apparatus |
| 09/05/2007 | CN101031895A Simultaneous external read operation during internal programming in a flash memory device |
| 09/04/2007 | US7266759 Semiconductor integrated circuit device and error checking and correcting method thereof |
| 09/04/2007 | US7266747 Error correction scheme for memory |
| 09/04/2007 | US7266739 Systems and methods associated with test equipment |
| 09/04/2007 | US7266738 Test apparatus, phase adjusting method and memory controller |
| 09/04/2007 | US7266737 Method for enabling scan of defective ram prior to repair |
| 09/04/2007 | US7266736 Recording medium having spare area for defect management and information on defect management, and method of allocating spare area and method of managing defects |