| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
|---|
| 05/22/2007 | US7222279 Semiconductor integrated circuit and test system for testing the same |
| 05/22/2007 | US7222274 Testing and repair methodology for memories having redundancy |
| 05/22/2007 | US7222273 Apparatus and method for testing semiconductor memory devices, capable of selectively changing frequencies of test pattern signals |
| 05/22/2007 | US7222272 Semiconductor integrated circuit and testing method thereof |
| 05/22/2007 | US7222271 Method for repairing hardware faults in memory chips |
| 05/22/2007 | US7222041 High-speed digital multiplexer |
| 05/22/2007 | US7221603 Defective block handling in a flash memory device |
| 05/22/2007 | US7221576 Dynamic RAM-and semiconductor device |
| 05/22/2007 | US7221212 Trimming functional parameters in integrated circuits |
| 05/22/2007 | US7220987 Semiconductor memory element and its lifetime operation starting device |
| 05/18/2007 | WO2007056651A1 Memory with retargetable memory cell redundancy |
| 05/18/2007 | WO2007055068A1 Memory diagnosis apparatus |
| 05/18/2007 | WO2006033099A3 States encoding in multi-bit flash cells for optimizing error rate |
| 05/17/2007 | US20070113157 Data set level mirroring to accomplish a volume merge/migrate in a digital storage system |
| 05/17/2007 | US20070113156 Information processing method and apparatus, recording medium, and program |
| 05/17/2007 | US20070113155 Semiconductor storage device equipped with ECC function |
| 05/17/2007 | US20070113154 Data processing method and apparatus, recording medium, reproducing method and apparatus using the same method |
| 05/17/2007 | US20070113153 Data processing method and apparatus, recording medium, reproducing method and apparatus using the same method |
| 05/17/2007 | US20070113152 Data processing method and apparatus, recording medium, reproducing method and apparatus using the same method |
| 05/17/2007 | US20070113151 Data processing method and apparatus, recording medium, reproducing method and apparatus using the same method |
| 05/17/2007 | US20070113150 Apparatus and method for memory asynchronous atomic read-correct-write operation |
| 05/17/2007 | US20070113122 Information recording medium, information reproducing apparatus, information reproducing method and information recording method |
| 05/17/2007 | US20070113121 Repair of semiconductor memory device via external command |
| 05/17/2007 | US20070113002 Scratch control memory array in a flash memory device |
| 05/17/2007 | US20070109889 Non-Volatile Memory and Method With Reduced Source Line Bias Errors |
| 05/17/2007 | US20070109888 Integrated circuit with test circuit |
| 05/17/2007 | US20070109887 Memory device that provides test results to multiple output pads |
| 05/17/2007 | US20070109886 Block redundancy implementation in heirarchical ram's |
| 05/17/2007 | US20070109885 Defect analysis place specifying device and defect analysis place specifying method |
| 05/17/2007 | US20070109884 Pseudo-dual port memory having a clock for each port |
| 05/17/2007 | US20070109883 Apparatus and method to reconfigure a storage array |
| 05/17/2007 | US20070109882 Method and apparatus for redundant memory configuration in voltage island |
| 05/17/2007 | US20070109881 Management of defective blocks in flash memories |
| 05/17/2007 | US20070109847 Non-Volatile Memory and Method With Improved Sensing |
| 05/17/2007 | US20070109699 Semiconductor integrated circuit |
| 05/16/2007 | CN1965372A Methods and apparatus for interfacing between test system and memory |
| 05/16/2007 | CN1963950A Semiconductor storage device equipped with ecc function |
| 05/16/2007 | CN1316744C Antifuse reroute of dies |
| 05/16/2007 | CN1316505C Method for manufacturing solid memory |
| 05/15/2007 | US7219286 Built off self test (BOST) in the kerf |
| 05/15/2007 | US7219285 Flash memory |
| 05/15/2007 | US7219277 Method for creating defect management information in an recording medium, and apparatus and medium based on said method |
| 05/15/2007 | US7219276 Testing CMOS CAM with redundancy |
| 05/15/2007 | US7219275 Method and apparatus for providing flexible modular redundancy allocation for memory built in self test of SRAM with redundancy |
| 05/15/2007 | US7219274 Memory module and method of testing the same |
| 05/15/2007 | US7219273 Method for testing media in a library without inserting media into the library database |
| 05/15/2007 | US7219272 Semiconductor integrated circuit with memory redundancy circuit |
| 05/15/2007 | US7219271 Memory device and method for redundancy/self-repair |
| 05/15/2007 | US7219166 External storage subsystem |
| 05/15/2007 | US7218561 Apparatus and method for semiconductor device repair with reduced number of programmable elements |
| 05/15/2007 | US7218559 Memory device having redundant memory for repairing defects |
| 05/10/2007 | US20070106925 Method and system using checksums to repair data |
| 05/10/2007 | US20070106923 Integrated circuit and method for testing memory on the integrated circuit |
| 05/10/2007 | US20070104004 Multi-Bit-Per-Cell Flash EEprom Memory with Refresh |
| 05/10/2007 | US20070104001 Current Reduction Circuit of Semiconductor Device |
| 05/10/2007 | US20070104000 Field programmable memory repair for eprom |
| 05/10/2007 | US20070103999 Redundancy circuit and semiconductor apparatus having the redundancy circuit |
| 05/10/2007 | US20070103998 Semiconductor memory for relieving a defective bit |
| 05/10/2007 | US20070103976 Flexible and Area Efficient Column Redundancy for Non-Volatile Memories |
| 05/10/2007 | DE102006043029A1 Testmodusverfahren und Vorrichtung für interne Zeitsteuersignale eines Speichers Test mode Method and apparatus for internal timing signals of a memory |
| 05/09/2007 | EP1783779A1 Integrated circuit with integrated test aid sub-circuit |
| 05/09/2007 | EP1782430A1 Reconfigurable computing architecture for space applications |
| 05/09/2007 | EP1782429A1 Repair of memory cells |
| 05/09/2007 | EP1723571A4 Methods and apparatus for data analysis |
| 05/09/2007 | EP1535192B1 Processor array |
| 05/09/2007 | CN1959849A Memory array and method for testing the same |
| 05/09/2007 | CN1959843A Device and method for regenerating information stored in memory medium |
| 05/08/2007 | US7216311 System and method for evaluating a semiconductor device pattern, method for controlling process of forming a semiconductor device pattern and method for monitoring a semiconductor device manufacturing process |
| 05/08/2007 | US7216284 Content addressable memory having reduced power consumption |
| 05/08/2007 | US7216277 Self-repairing redundancy for memory blocks in programmable logic devices |
| 05/08/2007 | US7216272 Method for reducing SRAM test time by applying power-up state knowledge |
| 05/08/2007 | US7216271 Testing apparatus and a testing method |
| 05/08/2007 | US7216270 System and method for providing testing and failure analysis of integrated circuit memory devices |
| 05/08/2007 | US7216262 RAM diagnostic read circuit providing external integrated circuit RAM failure diagnosis and method |
| 05/08/2007 | US7216198 DRAM with super self-refresh and error correction for extended period between refresh operations |
| 05/08/2007 | US7215596 Circuit and method for controlling inversion of delay locked loop and delay locked loop and synchronous semiconductor memory device using the same |
| 05/08/2007 | US7215581 Triple redundant latch design with low delay time |
| 05/08/2007 | US7215134 Apparatus for determining burn-in reliability from wafer level burn-in |
| 05/03/2007 | WO2007050608A2 Testing and recovery in a multilayer device |
| 05/03/2007 | WO2007025817A3 Data processing system with error correction and a method for the operation thereof |
| 05/03/2007 | US20070101240 Data processing method and apparatus, recording medium, reproducing method and apparatus using the same method |
| 05/03/2007 | US20070101239 Data processing method and apparatus, recording medium, reproducing method and apparatus using the same method |
| 05/03/2007 | US20070101238 Apparatus and method for memory read-refresh, scrubbing and variable-rate refresh |
| 05/03/2007 | US20070101237 Memory card and memory controller |
| 05/03/2007 | US20070101236 Method and system for performing function-specific memory checks within a vehicle-based control system |
| 05/03/2007 | US20070101212 Reading method and apparatus for an information recording medium and spare area allocation thereof |
| 05/03/2007 | US20070101211 Defect management method and disk drive using the same |
| 05/03/2007 | US20070101184 Apparatus and method for detecting over-programming condition in multistate memory device |
| 05/03/2007 | US20070097813 Information storage medium, information reproduction apparatus, information reproduction method, and information recording method |
| 05/03/2007 | US20070097763 Manufacturing method of semiconductor integrated circuit device |
| 05/03/2007 | US20070097762 Semiconductor storage device, redundancy circuit thereof, and portable electronic device |
| 05/03/2007 | US20070097761 Semiconductor Storage Device |
| 05/03/2007 | US20070097760 Compact column redundancy CAM architecture for concurrent read and write operations in multi-segment memory arrays |
| 05/03/2007 | DE69034227T2 EEprom-System mit Blocklöschung EEprom system with block erase |
| 05/03/2007 | DE112005001496T5 Prüfvorrichtung und Prüfverfahren Tester and test methods |
| 05/03/2007 | DE10310140B4 Testvorrichtung zum Test von integrierten Bausteinen sowie Verfahren zum Betrieb einer Testvorrichtung A test device for testing of integrated devices, and methods for operating a test apparatus |
| 05/03/2007 | DE102006051172A1 Testing device for testing a semiconductor device comprises a section for producing a test pattern, side generators, a selecting section for the generators and a section for feeding a test signal to the semiconductor device |
| 05/03/2007 | DE102006046299A1 Verfahren zur Deaktivierung einer redundanten Wortleitung Method for deactivating a redundant word line |
| 05/03/2007 | DE102005051996A1 Read amplifier for detecting condition of e.g. flash memory cell, has reference current source to provide reference current to input of amplifier, and clocked control flip-flop for controlling source as reaction of control clock signal |
| 05/03/2007 | DE102005051814A1 Electronic test apparatus e.g. for testing circuits, has clock signal generator and driver having several subunits each generating phase-shifted driver signal in response to clock signal |