Patents
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
01/2009
01/22/2009US20090024885 Semiconductor integrated circuit and test system thereof
01/22/2009US20090024882 Method for monitoring an internal control signal of a memory device and apparatus therefor
01/22/2009US20090024879 Disk array device, parity data generating circuit for raid and galois field multiplying circuit
01/22/2009US20090022000 Semiconductor storage device and test method therefor
01/22/2009US20090021999 Semiconductor device
01/22/2009US20090021996 Memory Circuit, Memory Component, Data Processing System and Method of Testing a Memory Circuit
01/22/2009US20090021993 Semiconductor memory device
01/22/2009US20090021981 Nonvolatile memory device including circuit formed of thin film transistors
01/22/2009DE102007033053A1 Speicherschaltung, Speicherbauteil, Datenverarbeitungssystem und Verfahren zum Testen einer Speicherschaltung Memory circuit memory device, data processing system and method for testing a memory circuit
01/22/2009DE10147138B4 Verfahren zur Integration von imperfekten Halbleiterspeichereinrichtungen in Datenverarbeitungsvorrichtungen Method for the integration of imperfect semiconductor memory devices in data processing devices
01/21/2009CN101350226A Method for verifying whether detection result of detection device is correct or not
01/21/2009CN100454547C Semiconductor memory element and its lifetime operation starting device
01/21/2009CN100454436C Semiconductor memory device
01/21/2009CN100454423C Method and system for managing shortage position in data storage medium
01/20/2009US7480841 Semiconductor integrated circuit which properly executes an operational test of a circuit under test in the semiconductor integrated circuit
01/20/2009US7480195 Internal data comparison for memory testing
01/20/2009US7479694 Membrane 3D IC fabrication
01/15/2009WO2009009303A2 Data storage with an outer block code and a stream-based inner code
01/15/2009WO2009009302A2 Error recovery storage along a nand-flash string
01/15/2009WO2009008080A1 Semiconductor device
01/15/2009WO2009008079A1 Semiconductor memory device and system
01/15/2009WO2009008078A1 Semiconductor memory device and system
01/15/2009WO2009008031A1 Semiconductor memory and system
01/15/2009US20090019341 Dynamic memory architecture employing passive expiration of data
01/15/2009US20090019218 Non-Volatile Memory And Method With Non-Sequential Update Block Management
01/15/2009US20090019217 Non-Volatile Memory And Method With Memory Planes Alignment
01/15/2009US20090019210 Nonvolatile memory apparatus
01/15/2009US20090016130 Memory device and method of testing a memory device
01/15/2009US20090016129 Design structure for increasing fuse programming yield
01/15/2009US20090016122 Dual word line or floating bit line low power sram
01/15/2009US20090016115 Testing non-volatile memory devices for charge leakage
01/15/2009DE102008031288A1 Speichervorrichtung und Verfahren zum Testen einer Speichervorrichtung Memory device and method for testing a memory device
01/15/2009DE102007032560A1 Semiconductor component e.g. ROM, solder contact and/or contact ball checking system, has medium for supplying mechanical load to solder contacts, and bristles arranged such that load results through touch/friction
01/15/2009DE102007029752A1 Semiconductor component testing method for semiconductor memory element such as function memory element, involves renewing selected digital value, and comparing levels of data signals produced in response to renewed selected digital value
01/14/2009EP2015311A1 Semiconductor memory system for flash memory
01/14/2009EP2015310A2 Methods for identifying non-volatile memory elements with poor subthreshold slope or weak transconductance
01/14/2009EP2015308A1 Oscillation device, method of oscillation, and memory device
01/14/2009EP2015089A1 Tester, circuit, and electronic device
01/14/2009EP1388150B1 Integrated circuit with self-test device for an embedded non-volatile memory and related test method
01/14/2009CN201181590Y Test module and test system
01/14/2009CN101345090A Memory element test method
01/14/2009CN100452240C Multi-port memory device having serial i/o interface
01/14/2009CN100452236C Semiconductor memory
01/14/2009CN100452227C Method and apparatus for picking absolute time data of prerecording ditch groove
01/14/2009CN100451668C Memory bus checking procedure
01/13/2009US7478308 Error-correction memory architecture for testing production
01/13/2009US7478307 Method for improving un-correctable errors in a computer system
01/13/2009US7478306 Method of detecting error location, and error detection circuit, error correction circuit, and reproducing apparatus using the method
01/13/2009US7478302 Signal integrity self-test architecture
01/13/2009US7478292 Structure and method for detecting errors in a multilevel memory device with improved programming granularity
01/13/2009US7478291 Memory array repair where repair logic cannot operate at same operating condition as array
01/13/2009US7478290 Testing DRAM chips with a PC motherboard attached to a chip handler by a solder-side adaptor board with an advanced-memory buffer (AMB)
01/13/2009US7478289 System and method for improving the yield of integrated circuits containing memory
01/13/2009US7478288 Method and apparatus for recording data on and reproducing data from a recording medium and the recording medium
01/13/2009US7478287 Semiconductor integrated circuit and electronic device
01/13/2009US7478165 Data carousel receiving and caching
01/13/2009US7477557 256 Meg dynamic random access memory
01/13/2009US7477556 256 Meg dynamic random access memory
01/13/2009US7477222 Redundancy shift register circuit for driver circuit in active matrix type liquid crystal display device
01/13/2009US7477091 Defect tolerant redundancy
01/08/2009US20090010085 Semiconductor integrated circuit device and redundancy method thereof
01/08/2009US20090010078 Semiconductor memory device
01/08/2009DE102007031492A1 Method for testing integrated circuit, involves receiving and evaluating switching characteristic of integrated circuit, particularly switch-on characteristic
01/07/2009EP2012324A1 Compression of data traces for an integrated circuit with multiple memories
01/07/2009EP1218821B1 Improved memory integrity for meters
01/07/2009CN101339812A Storage apparatus reading method, system and storage apparatus test apparatus
01/07/2009CN101339811A Build-in self-test method of memory
01/07/2009CN100449651C Memory system having fast and slow data reading mechanisms
01/07/2009CN100449650C Test structure for a single-sided buried strap dram memory cell data array
01/07/2009CN100449645C Dynamic semiconductor memory device
01/06/2009US7475327 Optical disc recording and reproducing apparatus
01/06/2009US7475326 Error detection and correction method and system for memory devices
01/06/2009US7475324 Encoding apparatus for storing data to disk
01/06/2009US7475316 System, method and storage medium for providing a high speed test interface to a memory subsystem
01/06/2009US7475300 Test circuit and test method
01/06/2009US7474576 Repairing Advanced-Memory Buffer (AMB) with redundant memory buffer for repairing DRAM on a fully-buffered memory-module
01/06/2009US7474575 Apparatus for testing a memory of an integrated circuit
01/06/2009US7474573 Semiconductor memory device capable of writing different data in cells coupled to one word line during burn-in test
01/06/2009US7474564 Non-volatile memory device capable of changing increment of program voltage according to mode of operation
01/06/2009US7474550 Dynamic RAM-and semiconductor device
01/02/2009DE102008030408A1 System und Verfahren zum Adressieren von Fehlern in einer Mehrchipspeichervorrichtung System and method of addressing errors in a multi-chip memory device
01/02/2009DE102007029371A1 Verfahren zum Verbergen defekter Speicherzellen und Halbleiterspeicher A method for hiding defective memory cells and semiconductor memory
01/01/2009US20090006914 Semiconductor integrated circuit and method of detecting fail path thereof
01/01/2009US20090006913 Semiconductor memory device having test address generating circuit and test method thereof
01/01/2009US20090006912 Semiconductor memory device having burn-in test mode and method for driving the same
01/01/2009US20090006911 Data replacement processing method
01/01/2009US20090003104 Test circuit and method for use in semiconductor memory device
01/01/2009US20090003102 Method for testing semiconductor memory device
01/01/2009US20090003101 Apparatus and method of setting test mode in semiconductor integrated circuit
01/01/2009US20090003100 Semiconductor memory device and method of inputting addresses therein
01/01/2009US20090003099 Memory test mode for charge retention testing
01/01/2009US20090003098 Method for Hiding Defective Memory Cells and Semiconductor Memories
01/01/2009US20090003088 Semiconductor memory device
01/01/2009US20090003046 Memory with dynamic redundancy configuration
01/01/2009US20090002041 Method for improving stability and lock time for synchronous circuits
12/2008
12/31/2008WO2009002364A1 Systems and methods for adapting parameters to increase throughput during laser-based wafer processing
12/31/2008WO2009001426A1 Semiconductor device
12/31/2008WO2007043042A3 Method of error correction in mbc flash memory
12/31/2008EP2008283A2 Non-volatile memory and method with redundancy data buffered in data latches for defective locations
12/31/2008EP1634301B1 Apparatus for measuring current in sensing a memory cell
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