| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 07/28/2009 | US7568135 Use of alternative value in cell detection |
| 07/28/2009 | US7568134 Method of exhaustively testing an embedded ROM using generated ATPG test patterns |
| 07/28/2009 | US7567482 Block redundancy implementation in heirarchical ram's |
| 07/28/2009 | US7567472 Memory block testing |
| 07/28/2009 | US7567454 Thin film magnetic memory device capable of conducting stable data read and write operations |
| 07/23/2009 | US20090187809 Integrated circuit including an ecc error counter |
| 07/23/2009 | US20090187798 Nonvolatile memory having non-power of two memory capacity |
| 07/23/2009 | US20090187702 Nonvolatile memory |
| 07/23/2009 | US20090185439 Architecture of highly integrated semiconductor memory device |
| 07/23/2009 | US20090185438 Semiconductor memory device having redundancy circuit for repairing defective unit cell, and method for repairing defective unit cell |
| 07/23/2009 | US20090185421 Charge-Trap Flash Memory Device with Reduced Erasure Stress and Related Programming and Erasing Methods Thereof |
| 07/23/2009 | DE10326774B4 Auf-Chip Erfassung der Systemoperationsfrequenz in einem DRAM, um DRAM-Operationen einzustellen On-chip detection system of the operation frequency in a DRAM to set the DRAM operations |
| 07/22/2009 | EP2080097A1 Memory system and method for storing and correcting data |
| 07/22/2009 | CN101488369A Interface circuit for BCH code controller |
| 07/22/2009 | CN100517709C Integrated circuit with detecting circuit |
| 07/22/2009 | CN100517516C floating word line detecting method, stroage equipment and testing emthod and system thereof, and stroage device array |
| 07/22/2009 | CN100517515C Method and system for measurement |
| 07/22/2009 | CN100517514C Memory detection clamp |
| 07/22/2009 | CN100517513C Method for testing thin oxidizing layer of semiconductor memory cell by using breakdown voltage |
| 07/21/2009 | US7565599 Information storage medium on which drive data is recorded, and method of recording information on the information storage medium |
| 07/21/2009 | US7565598 Error correction for disk storage media |
| 07/21/2009 | US7565597 Fast parity scan of memory arrays |
| 07/21/2009 | US7565596 Data recovery systems |
| 07/21/2009 | US7565593 Apparatus and method for memory bit-swapping-within-address-range circuit |
| 07/21/2009 | US7565588 Semiconductor device and data storage apparatus |
| 07/21/2009 | US7565587 Background block erase check for flash memories |
| 07/21/2009 | US7565586 Method and apparatus for latent fault memory scrub in memory intensive computer hardware |
| 07/21/2009 | US7565585 Integrated redundancy architecture and method for providing redundancy allocation to an embedded memory system |
| 07/21/2009 | US7565518 Semiconductor device and method of controlling the semiconductor device |
| 07/16/2009 | US20090183054 Information recording medium, recording/reproducing apparatus and recording/reproducing method |
| 07/16/2009 | US20090183053 Memory apparatus and method using erasure error correction to reduce power consumption |
| 07/16/2009 | US20090183039 Diagnostic interface architecture for memory device |
| 07/16/2009 | US20090183032 Data processing apparatus and method for testing stability of memory cells in a memory device |
| 07/16/2009 | US20090180584 Diagnostic method and apparatus for non-destructively observing latch data |
| 07/16/2009 | US20090180340 Semiconductor integrated circuit including column redundancy fuse block |
| 07/16/2009 | US20090180339 Semiconductor memory device with three-dimensional array and repair method thereof |
| 07/16/2009 | US20090180322 Nand string with a redundant memory cell |
| 07/15/2009 | EP1629505B1 Testing ram address decoder for resistive open defects |
| 07/15/2009 | EP1604372B1 Memory built-in self-test (bist) architecture having distributed command interpretation and generalized command protocol |
| 07/15/2009 | CN101483069A Memory architecture and configuration method thereof |
| 07/15/2009 | CN100514499C FLASH internal unit testing method |
| 07/15/2009 | CN100514492C Device and method for pulse width control in a phase change memory device |
| 07/15/2009 | CN100514076C Integrated circuit with test pad structure and method of testing |
| 07/14/2009 | US7562270 Medium drive and method of generating a defect map for registering positions of defects on a medium |
| 07/14/2009 | US7562269 Semiconductor storage device |
| 07/14/2009 | US7562268 Method and apparatus for testing a memory device with compressed data using a single output |
| 07/14/2009 | US7562256 Semiconductor memory device for build-in fault diagnosis |
| 07/14/2009 | US7561483 Internally asymmetric method for evaluating static memory cell dynamic stability |
| 07/14/2009 | US7561482 Defective block isolation in a non-volatile memory system |
| 07/14/2009 | US7560339 Nonvolatile memory cell comprising a reduced height vertical diode |
| 07/09/2009 | WO2009086417A1 Flash memory timing pre-characterization for use in ormal operation |
| 07/09/2009 | WO2009058125A3 Method and apparatus for testing a memory device |
| 07/09/2009 | US20090177946 Memory Initialization Time Reduction |
| 07/09/2009 | US20090176329 Phase-change memory device and method of manufacturing the same |
| 07/09/2009 | US20090175106 Apparatus for implementing efuse sense amplifier testing without blowing the efuse |
| 07/09/2009 | US20090175105 Semiconductor memory device that includes an address coding method for a multi-word line test |
| 07/09/2009 | US20090175104 Three dimensional structure memory |
| 07/09/2009 | US20090175072 Phase-change random access memory devices and related methods of operation |
| 07/09/2009 | US20090175071 Phase change memory dynamic resistance test and manufacturing methods |
| 07/09/2009 | DE102008062647A1 Integrierte Schaltung und Verfahren zum Betreiben einer integrierten Schaltung Integrated circuit and method for operating an integrated circuit |
| 07/08/2009 | EP1634172B1 Fault tolerant data storage circuit |
| 07/08/2009 | EP1151384B1 Storage system comprising means managing a storage unit with anti-wear and anti-wear management of a storage unit |
| 07/08/2009 | EP1129454B1 Method of testing a memory |
| 07/08/2009 | CN101479807A Memory device with speculative commands to memory core |
| 07/08/2009 | CN101477838A Condition detection apparatus, system and electronic device for NAND flash memory body |
| 07/08/2009 | CN101477837A Detection method and apparatus for memory capacity |
| 07/08/2009 | CN100511981C Semiconductor integrated circuit and operational amplifier circuit |
| 07/08/2009 | CN100511486C Integrated circuit device comprising test circuit for measuring AC characteristic of internal memory macro |
| 07/08/2009 | CN100511472C 半导体存储器件 The semiconductor memory device |
| 07/08/2009 | CN100511168C Process for the secure writing of a pointer for a circular memory and a corresponding annular memory |
| 07/07/2009 | US7559005 Method and device for storing data |
| 07/07/2009 | US7558999 Learning based logic diagnosis |
| 07/07/2009 | US7558993 Test apparatus for semiconductor memory device |
| 07/07/2009 | US7558941 Automatic detection of micro-tile enabled memory |
| 07/07/2009 | US7558136 Internally asymmetric methods and circuits for evaluating static memory cell dynamic stability |
| 07/07/2009 | US7558135 Semiconductor memory device and test method thereof |
| 07/07/2009 | US7558120 Semiconductor integrated circuit device comprising MOS transistor having charge storage layer and method for testing semiconductor memory device |
| 07/07/2009 | US7558102 Device and method having a memory array storing each bit in multiple memory cells |
| 07/07/2009 | US7557561 Electronic device, circuit and test apparatus |
| 07/02/2009 | WO2009061093A3 Storage array including a local clock buffer with programmable timing |
| 07/02/2009 | US20090172499 Patrol function used in flash storage controller to detect data errors |
| 07/02/2009 | US20090172498 Error correction in copy back memory operations |
| 07/02/2009 | US20090172486 Testing embedded memories in an integrated circuit |
| 07/02/2009 | US20090172483 On-chip failure analysis circuit and on-chip failure analysis method |
| 07/02/2009 | US20090172482 Methods for performing fail test, block management, erasing and programming in a nonvolatile memory device |
| 07/02/2009 | US20090172481 Partial Voltage Read of Memory |
| 07/02/2009 | US20090172480 System and method for testing a packetized memory device |
| 07/02/2009 | US20090172479 Semiconductor memory device and method for testing the same |
| 07/02/2009 | US20090168573 Adaptive memory array voltage adjustment |
| 07/02/2009 | US20090168572 Semiconductor memory |
| 07/02/2009 | US20090168571 Dynamic random access memory device and method of determining refresh cycle thereof |
| 07/02/2009 | US20090168570 Redundancy circuit using column addresses |
| 07/02/2009 | US20090168569 Method and device for redundancy replacement in semiconductor devices using a multiplexer |
| 07/02/2009 | US20090168541 Electrical erasable programmable memory transconductance testing |
| 07/02/2009 | US20090168523 Non-volatile semiconductor memory device |
| 07/02/2009 | US20090168478 Semiconductor memory device that can relieve defective address |
| 07/02/2009 | DE102007062092A1 Data holding test executing system for resistive switching memory device i.e. conductive bridging RAM memory device, has applies bias voltage to conductive bridging RAM memory cell of memory device, before or during data holding test |
| 07/01/2009 | EP2074626A2 Non-volatile memory and method for linear estimation of initial programming voltage |
| 07/01/2009 | EP1999593A4 Firmware extendable commands for a microcontroller based flash memory digital controller |
| 07/01/2009 | EP1994535B1 Format transformation of test data |