Patents
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
03/2009
03/11/2009CN100468349C Method of testing memory
03/10/2009US7502985 Method of detecting and correcting errors for a memory and corresponding integrated circuit
03/10/2009US7502977 Method and apparatus for reconfigurable memory
03/10/2009US7502976 Testing embedded memories in an integrated circuit
03/10/2009US7502276 Method and apparatus for multi-word write in domino read SRAMs
03/10/2009US7502269 Semiconductor memory device capable of controlling drivability of overdriver
03/10/2009US7502268 Voltage control apparatus and method of controlling voltage using the same
03/10/2009US7502264 On-chip EE-PROM programming waveform generation
03/05/2009WO2009028051A1 Memory test method and memory tester
03/05/2009WO2009028037A1 System, relay device, tester, and manufacturing method for device
03/05/2009WO2009026696A1 Daisy-chain memory configuration and usage
03/05/2009WO2009009302A3 Error recovery storage along a nand-flash string
03/05/2009US20090063934 Multi-channel memory system including error correction decoder architecture with efficient area utilization
03/05/2009US20090063918 Apparatus and method for detecting word line leakage in memory devices
03/05/2009US20090063917 Semiconductor integrated circuit
03/05/2009US20090063916 Method for self-test and self-repair in a multi-chip package environment
03/05/2009US20090063915 Managing purgeable memory objects using purge groups
03/05/2009US20090063913 Semiconductor integrated circuit
03/05/2009US20090063912 Method and Apparatus for Implementing SRAM Cell Write Performance Evaluation
03/05/2009US20090063887 Memory module with termination component
03/05/2009US20090059706 Sram active write assist method for improved operational margins
03/05/2009US20090059705 Sram having active write assist for improved operational margins
03/05/2009US20090059699 Semiconductor memory device and its test method
03/05/2009US20090059698 Method for testing memory
03/05/2009US20090059697 Method and apparatus for implementing sram cell write performance evaluation
03/05/2009US20090059696 Multi-port memory device
03/05/2009US20090059695 Semiconductor memory device and block management method of the same
03/05/2009US20090059684 Method and Apparatus for Storing Data in a Write-Once Non-Volatile Memory
03/05/2009US20090059682 Semiconductor memory device having antifuse circuitry
03/05/2009US20090059647 Semiconductor storage device
03/05/2009DE102007041608A1 Prober zum Testen von Bauelementen Prober for testing components
03/05/2009CA2695396A1 Daisy-chain memory configuration and usage
03/04/2009EP2030114A1 Transparent test method and scan flip-flop
03/04/2009EP1588380B1 Method for the recognition and/or correction of memory access errors and electronic circuit arrangement for carrying out said method
03/04/2009CN101379566A Repair bits for low voltage cache
03/04/2009CN101377960A Apparatus and method for detecting word line leakage in memory devices
03/04/2009CN101377959A Selection method and device for restoring redundant bit line
03/04/2009CN101377958A Method for monitoring flash memory wiping/writing performance
03/04/2009CN101377957A Device and method for reading and writing memory chip
03/04/2009CN100466108C Method and apparatus for measuring current a in sensing a memory cell
03/04/2009CN100466107C Circuit and method for testing embedded random-access memory circuits
03/04/2009CN100466102C Content addressable memory (CAM) with error checking and correction (ECC) capability
03/03/2009US7500171 Memory circuit
03/03/2009US7500160 System and method for testing a data storage device without revealing memory content
03/03/2009US7500081 Power-up implementation for block-alterable memory with zero-second erase time
03/03/2009US7499362 Techniques for storing accurate operating current values
03/03/2009US7498838 Hardware and software programmable fuses for memory repair
02/2009
02/26/2009WO2009026364A1 Threshold voltage digitizer for array of programmable threshold transistors
02/26/2009WO2009024423A1 Programmable diagnostic memory module
02/26/2009US20090055714 Optimizing the size of memory devices used for error correction code storage
02/26/2009US20090055713 Ecc control circuits, multi-channel memory systems including the same, and related methods of operation
02/26/2009US20090055401 Loosely Coupled Mass Storage Computer Cluster
02/26/2009US20090052264 Refresh characteristic testing circuit and method for testing refresh using the same
02/26/2009US20090052263 Write driving circuit
02/26/2009US20090052249 Semiconductor memory device having memory block configuration
02/26/2009US20090052248 Flash memory array system including a top gate memory cell
02/26/2009US20090052247 Fuse circuit and flash memory device having the same
02/26/2009DE10335708B4 Hub-Baustein zum Anschließen von einem oder mehreren Speicherbausteinen Hub module for connecting one or more storage devices
02/26/2009DE102008039070A1 Halbleiterprüfvorrichtung Semiconductor testing
02/26/2009DE102005025216B4 Hub eines Speichermoduls und Verfahren zum Testen eines Speichermoduls unter Verwendung des Hubs Hub of a memory module and method for testing a memory module using the stroke
02/25/2009CN101375346A Strobe technique for test of digital signal timing
02/25/2009CN101373641A Memory and one bit reading error detection method
02/25/2009CN101373640A Flash memory apparatus and method for error correction
02/25/2009CN101373639A Memory time sequence measuring circuit and test method thereof
02/25/2009CN100464376C Self-examining device and method of ROM
02/24/2009US7496823 Hardware based memory scrubbing
02/24/2009US7496822 Apparatus and method for responding to data retention loss in a non-volatile memory unit using error checking and correction techniques
02/24/2009US7496819 Custom logic BIST for memory controller
02/24/2009US7496817 Method for determining integrity of memory
02/24/2009US7496811 Storage medium reproducing apparatus, storage medium reproducing method, and computer program product for reading information from storage medium
02/24/2009US7496810 Semiconductor memory device and its data writing method
02/24/2009US7496809 Integrated scannable interface for testing memory
02/24/2009US7496808 Parallel bit test circuit in semiconductor memory device and associated method
02/24/2009US7496806 Method of and apparatus for managing disc defects using temporary defect management information (TDFL) and temporary defect management information (TDDS), and disc having the TDFL and TDDS
02/24/2009US7495978 Semiconductor device and memory circuit including a redundancy arrangement
02/24/2009US7495977 Memory system having high-speed row block and column redundancy
02/24/2009US7495976 Repairing integrated circuit memory arrays
02/24/2009US7495975 Memory system including on-die termination unit having inductor
02/24/2009CA2471523C Write-once type optical disc, and method and apparatus for managing defective areas on write-once type optical disc
02/19/2009WO2009023024A1 Memory device with reduced buffer current during power-down mode
02/19/2009WO2009009303A3 Data storage with an outer block code and a stream-based inner code
02/19/2009US20090049455 Command interface systems and methods
02/19/2009US20090049365 System and method for providing error correction and detection in a memory system
02/19/2009US20090049351 Method for Creating a Memory Defect Map and Optimizing Performance Using the Memory Defect Map
02/19/2009US20090049350 Error correction code (ecc) circuit test mode
02/19/2009US20090049349 Semiconductor device using logic chip
02/19/2009US20090049348 Semiconductor storage device
02/19/2009US20090046526 Word line driving circuit and method of testing a word line using the word line driving circuit
02/19/2009US20090046525 Wafer burn-in test circuit
02/19/2009US20090046524 Multi-column decoder stress test circuit
02/19/2009US20090046523 Semiconductor memory device and control method thereof
02/19/2009US20090046049 Redundancy shift register circuit for driver circuit in active matrix type liquid crystal display device
02/19/2009DE10115293B4 Verfahren zum Kennzeichnen eines integrierten Schaltkreises und integrierter Schaltkreis Method for marking an integrated circuit and integrated circuit
02/18/2009EP2026356A2 Method for creating a memory defect map and optimizing performance using the memory defect map
02/18/2009EP2026355A2 System and method for implementing a memory defect map
02/18/2009EP2026354A1 Apparatus and methods for tuning a memory interface
02/18/2009EP2026209A2 System and method for using a memory mapping function to map memory defects
02/18/2009EP2026081A1 Test device and test method
02/18/2009EP1702338B1 Robust data duplication and improved update method in a multibit non-volatile memory
02/18/2009CN101369466A High-performance internal memory test module
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