| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 01/13/2010 | CN101627446A Test device |
| 01/13/2010 | CN101627445A Tester |
| 01/13/2010 | CN101625904A Method for verifying storage unit combination rule |
| 01/13/2010 | CN101625903A Monitoring memory |
| 01/13/2010 | CN101625902A Method, system and device for acquiring service life of semiconductor storage medium |
| 01/13/2010 | CN101625901A Method for prewarning service life of semiconductor storage medium and system and device using same |
| 01/13/2010 | CN101625900A Method for displaying service life of semiconductor storage medium and system and device using same |
| 01/13/2010 | CN100580815C Storage module with detector |
| 01/13/2010 | CN100580802C Multi-port memory device with serial input/output interface |
| 01/12/2010 | US7647548 Methods and apparatus for low-density parity check decoding using hardware-sharing and serial sum-product architecture |
| 01/12/2010 | US7647544 Disk drive implementing data path protection without writing the error detection code data to the disk |
| 01/12/2010 | US7647543 Reprogrammable field programmable gate array with integrated system for mitigating effects of single event upsets |
| 01/12/2010 | US7647536 Repair bits for a low voltage cache |
| 01/07/2010 | WO2010002561A2 Method and apparatus for repairing high capacity/high bandwidth memory devices |
| 01/07/2010 | WO2009121022A3 Systems, methods, and apparatuses to save memory self-refresh power |
| 01/07/2010 | US20100005368 Encoder of cyclic codes for partially written codewords in flash memory |
| 01/07/2010 | US20100005366 Cascade interconnect memory system with enhanced reliability |
| 01/07/2010 | US20100005350 Test mode control circuit and method for using the same in semiconductor memory device |
| 01/07/2010 | US20100002530 Memory Address Repair Without Enable Fuses |
| 01/07/2010 | US20100002512 Disabling faulty flash memory dies |
| 01/07/2010 | US20100002488 F-SRAM Margin Screen |
| 01/06/2010 | CN201378431Y Control circuit device based on memory of NAND gate structure |
| 01/06/2010 | CN101622676A Memory system |
| 01/06/2010 | CN101622675A Apparatus, method, system of NAND defect management |
| 01/06/2010 | CN100578674C Register testing method and system |
| 01/06/2010 | CN100578664C Redundancy control circuit and semiconductor device using the same |
| 01/06/2010 | CN100578656C System and method for self-testing and repair of memory modules |
| 01/05/2010 | US7644348 Method and apparatus for error detection and correction |
| 01/05/2010 | US7644347 Silent data corruption mitigation using error correction code with embedded signaling fault detection |
| 01/05/2010 | US7644342 Semiconductor memory device |
| 01/05/2010 | US7644341 Method and system for correcting soft errors in memory circuit |
| 01/05/2010 | US7644324 Semiconductor memory tester |
| 01/05/2010 | US7644323 Method and apparatus of build-in self-diagnosis and repair in a memory with syndrome identification |
| 01/05/2010 | US7644310 Semiconductor IC incorporating a co-debugging function and test system |
| 01/05/2010 | US7644235 Device and method for configuring a cache tag in accordance with burst length |
| 01/05/2010 | US7643365 Semiconductor integrated circuit and method of testing same |
| 01/05/2010 | US7643363 Concept for testing an integrated circuit |
| 01/05/2010 | US7642105 Manufacturing method for partially-good memory modules with defect table in EEPROM |
| 12/31/2009 | US20090327837 NAND error management |
| 12/31/2009 | US20090323447 Apparatus for measuring data setup/hold time |
| 12/31/2009 | US20090323446 Memory operation testing |
| 12/31/2009 | US20090323445 High Performance Read Bypass Test for SRAM Circuits |
| 12/31/2009 | US20090323417 Semiconductor memory repairing a defective bit and semiconductor memory system |
| 12/31/2009 | DE112008000397T5 Eingebettete Architektur mit serieller Schnittstelle zum Testen von Flashspeichern Embedded architecture with serial interface for testing flash memories |
| 12/30/2009 | EP2138927A2 Haptic effect provisionig for a mobile communication terminal |
| 12/30/2009 | CN201374194Y Memory pin signal identification card |
| 12/30/2009 | CN101615433A Storage device and testing method thereof |
| 12/30/2009 | CN101615428A Detection method in non-volatile memory and reading method |
| 12/30/2009 | CN100576361C FPGA built-in dual port memory test method |
| 12/30/2009 | CN100576360C Semiconductor memory device |
| 12/30/2009 | CN100576359C Increasing the effectiveness of error correction codes and operating multi-level memory systems by using information about the quality of the stored data |
| 12/30/2009 | CN100576357C Method for reducing storage unit write-in disorder |
| 12/30/2009 | CN100576356C Method for reducing storage unit write-in disorder |
| 12/30/2009 | CN100576348C Method and test device for determining a repair solution for a memory module |
| 12/30/2009 | CN100576346C Information reading apparatus, method and corresponding storage medium |
| 12/30/2009 | CN100576342C High-capacity FLASH solid memory controller |
| 12/30/2009 | CN100576340C DRAM stacked package, DIMM, and semiconductor manufacturing method |
| 12/29/2009 | US7640484 Triple parity technique for enabling efficient recovery from triple failures in a storage array |
| 12/29/2009 | US7640483 Error detecting code calculation circuit, error detecting code calculation method, and recording apparatus |
| 12/29/2009 | US7640482 Block processing in a block decoding device |
| 12/29/2009 | US7640481 Integrated circuit having multiple modes of operation |
| 12/29/2009 | US7640469 Electronic element comprising an electronic circuit which is to be tested and test system arrangement which is used to test the electronic element |
| 12/29/2009 | US7640467 Semiconductor memory with a circuit for testing the same |
| 12/29/2009 | US7640466 Semiconductor integrated circuit device incorporating a data memory testing circuit |
| 12/29/2009 | US7640465 Memory with element redundancy |
| 12/29/2009 | US7640464 Recording medium having spare area defect management and information on defect management, and method of allocating spare area and method of managing defects |
| 12/29/2009 | US7639555 Test circuit device for semiconductor memory apparatus |
| 12/29/2009 | US7639554 Semiconductor device and method of testing semiconductor device |
| 12/29/2009 | US7639444 Real-time channel adaptation |
| 12/24/2009 | US20090319871 Memory system with semiconductor memory and its data transfer method |
| 12/24/2009 | US20090319870 Semiconductor memory device and error correcting method |
| 12/24/2009 | US20090319840 Semiconductor memory device and test method thereof |
| 12/24/2009 | US20090319839 Repairing memory arrays |
| 12/24/2009 | US20090319745 System and method for an asynchronous data buffer having buffer write and read pointers |
| 12/24/2009 | US20090319719 System Having A Controller Device, A Buffer Device And A Plurality Of Memory Devices |
| 12/24/2009 | US20090316512 Block redundancy implementation in heirarchical ram's |
| 12/24/2009 | US20090316508 PRECISE tRCD MEASUREMENT IN A SEMICONDUCTOR MEMORY DEVICE |
| 12/24/2009 | US20090316507 Generation Of Test Sequences During Memory Built-In Self Testing Of Multiple Memories |
| 12/24/2009 | US20090316506 Serially Decoded Digital Device Testing |
| 12/24/2009 | US20090316505 Soft Error Robust Static Random Access Memory Cell Storage Configuration |
| 12/24/2009 | US20090316501 Memory malfunction prediction system and method |
| 12/24/2009 | US20090316497 Semiconductor device including nonvolatile memory |
| 12/24/2009 | US20090316495 Semiconductor device testable on quality of multiple memory cells in parallel and testing method of the same |
| 12/24/2009 | US20090316488 Memory self-test circuit, semiconductor device and ic card including the same, and memory self-test method |
| 12/24/2009 | US20090316474 Phase change memory |
| 12/24/2009 | US20090316469 Ferroelectric memory brake for screening and repairing bits |
| 12/24/2009 | US20090316460 Method and apparatus for memory redundancy in a microprocessor |
| 12/23/2009 | WO2009153624A1 A system for distributing available memory resource |
| 12/23/2009 | WO2009153623A1 Memory system with redundant data storage and error correction |
| 12/23/2009 | EP2136372A1 Method for evaluating sram memory cell and medium recording evaluation program of sram memory cell computer readably |
| 12/23/2009 | CN101611456A Embedded architecture with serial interface for testing flash memories |
| 12/23/2009 | CN101611453A Independent link and bank selection |
| 12/23/2009 | CN100573728C Memory controller automatized testing method and apparatus |
| 12/23/2009 | CN100573727C Multiport semiconductor memory device |
| 12/23/2009 | CN100573726C Self-testing IC based on 3D memorizer |
| 12/23/2009 | CN100573725C Circuit and method for test mode entry of a semiconductor memory device |
| 12/23/2009 | CN100573724C Soft ware and hardware combined monitoring and correcting method |
| 12/23/2009 | CN100573703C Memory device including self-ID information |
| 12/22/2009 | US7636880 Error correction scheme for memory |
| 12/22/2009 | US7636877 Test apparatus having a pattern memory and test method for testing a device under test |