Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
10/2010
10/12/2010US7813195 Method for testing semiconductor memory device
10/12/2010US7813194 Apparatus and method for repairing a semiconductor memory
10/12/2010US7813193 Ferroelectric memory brake for screening and repairing bits
10/12/2010US7812593 Method for improving stability and lock time for synchronous circuits
10/07/2010US20100257417 Compressing test responses using a compactor
10/07/2010US20100257416 Main board and system for memory mounting test
10/07/2010US20100257415 Instruction-based programmable memory built-in self test circuit and address generator thereof
10/07/2010US20100257401 Disk controller methods and apparatus with improved striping, redundancy operations and interfaces
10/07/2010US20100254205 Integrated circuit
10/07/2010US20100254196 Semiconductor device testing memory cells and test method
10/07/2010DE102008050057B4 Speicherbaustein mit mehreren Speicherchips Memory device having a plurality of memory chips
10/06/2010CN201600928U 一种芯片测试系统及自动测试向量发生器atpg A chip test systems and automatic test vector generator atpg
10/06/2010CN201600927U U盘数据恢复装置 U disk data recovery device
10/06/2010CN1992087B Parts testing device and method and interface apparatus thereof
10/06/2010CN1758382B Memory module with parallel testing
10/06/2010CN1741196B Test method for nonvolatile memory
10/06/2010CN101853706A Testing apparatus, testing method, and program
10/06/2010CN101853702A Flash memory and method thereof for improving reading speed by using built-in self test
10/06/2010CN101853693A Storage device and method for prolonging service life of storage device
10/06/2010CN101853692A Controller with flash memory test function, and storage system and test method thereof
10/06/2010CN101246741B System, device, method and packaging structure using flaw memory
10/05/2010US7810060 Critical area computation of composite fault mechanisms using Voronoi diagrams
10/05/2010US7810017 Variable sector-count ECC
10/05/2010US7810016 Semiconductor storage device equipped with ECC function
10/05/2010US7810015 Decoding with a concatenated error correcting code
10/05/2010US7810004 Integrated circuit having a subordinate test interface
10/05/2010US7809998 Method and apparatus for improving memory operation and yield
10/05/2010US7809997 Semiconductor device, unique ID of semiconductor device and method for verifying unique ID
10/05/2010US7809899 System for integrity protection for standard 2n-bit multiple sized memory devices
10/05/2010US7808851 Test circuit for multi-port memory device
10/05/2010US7808850 Semiconductor device and system
10/05/2010US7808849 Read leveling of memory units designed to receive access requests in a sequential chained topology
10/05/2010US7808848 Semiconductor memory
10/05/2010US7808844 Methods and apparatus for improved memory access
10/05/2010US7808092 Semiconductor device with a plurality of ground planes
10/05/2010US7806324 Methods of making and using memory card with enhanced testability
09/2010
09/30/2010US20100251073 Disk controller methods and apparatus with improved striping, redundancy operations and interfaces
09/30/2010US20100251044 System and method for using a memory mapping function to map memory defects
09/30/2010US20100251043 Semiconductor integrated circuit, circuit function veryfication device and method of veryfying circuit function
09/30/2010US20100251042 Double data rate memory physical interface high speed testing using self checking loopback
09/30/2010US20100251041 Memory controlling apparatus and method
09/30/2010US20100246301 Method for testing a main memory
09/30/2010US20100246300 Semiconductor memory devices including burn-in test circuits
09/30/2010US20100246299 Semiconductor storage device and redundancy method
09/30/2010US20100246298 Integrated circuit memory having assisted access and method therefor
09/30/2010US20100246297 Integrated circuit having an embedded memory and method for testing the memory
09/30/2010US20100246292 Cell Inferiority test circuit
09/30/2010US20100246235 Memory Cell Heating Elements
09/29/2010EP2233936A1 Test device and test method
09/29/2010EP2232502A1 Adapting word line pulse widths in memory systems
09/29/2010EP1479025B1 Methods and apparatus for semiconductor testing
09/29/2010CN1674145B Circuit for controlling an enabling time of an internal control signal according to an operating frequency of a memory device and the method thereof
09/29/2010CN101849263A Reducing the impact of interference during programming
09/29/2010CN101848000A Decoding method, encoding method and starting control system
09/29/2010CN101847447A Storage controller, storage control method and data access system
09/29/2010CN101847446A Protecting data on integrated circuit
09/28/2010US7805660 Multilevel semiconductor memory, write/read method thereto/therefrom and storage medium storing write/read program
09/28/2010US7805659 Method and data storage devices for a RAID system
09/28/2010US7805658 DRAM Cache with on-demand reload
09/28/2010US7805645 Data processing apparatus and method for testing stability of memory cells in a memory device
09/28/2010US7805644 Multiple pBIST controllers
09/28/2010US7805643 Non-volatile semiconductor memory device
09/23/2010WO2010107869A1 Stuck-at defect condition repair for a non-volatile memory cell
09/23/2010US20100241914 Controller having flash memory testing functions, and storage system and testing method thereof
09/23/2010US20100241911 Address generator of communication data interleaver and communication data decoding circuit
09/23/2010US20100238779 Device and method for determining defect sector on optical disc
09/23/2010US20100238741 Semiconductor device and write control method for semiconductor device
09/23/2010US20100238721 Stuck-At Defect Condition Repair for a Non-Volatile Memory Cell
09/23/2010US20100238704 Semiconductor memory device, method of manufacturing the same, and method of screening the same
09/23/2010US20100238700 Quiescent Testing of Non-Volatile Memory Array
09/23/2010US20100238699 Semiconductor memory and test method for the semiconducor memory
09/22/2010EP1989562B1 Dual-path, multimode sequential storage element
09/22/2010CN1886668B Identifying process and temperature of silicon chips
09/22/2010CN1856841B Nonvolatile semiconductor memory device having protection function for each memory block
09/22/2010CN101842850A Systematic error correction for multi-level flash memory
09/22/2010CN101842843A MRAM testing
09/22/2010CN101840733A Reliability test method
09/22/2010CN101840377A Data storage method based on RS (Reed-Solomon) erasure codes
09/22/2010CN101127244B Semiconductor memory device containing antifuse write voltage generation circuit
09/22/2010CN101127242B Semiconductor memory and system
09/21/2010US7802156 Identification circuit with repeatable output code
09/21/2010US7802155 Non-volatile memory device manufacturing process testing systems and methods thereof
09/21/2010US7802154 Method and apparatus for generating high-frequency command and address signals for high-speed semiconductor memory device testing
09/21/2010US7802152 Method and apparatus for recording high-speed input data into a matrix of memory devices
09/21/2010US7800964 Wafer burn-in test circuit
09/16/2010WO2010104219A1 Data protecting method in memory and apparatus using the same
09/16/2010WO2010103567A1 Test device and testing method
09/16/2010US20100235695 Memory apparatus and testing method thereof
09/16/2010US20100235694 Test apparatus and test method
09/16/2010US20100235693 Solid state drive testing apparatus and method
09/16/2010US20100235692 Memory test circuit and processor
09/16/2010US20100235691 Memory module and on-line build-in self-test method thereof for enhancing memory system reliability
09/16/2010US20100232242 Method for Constructing Shmoo Plots for SRAMS
09/16/2010US20100232241 Redundancy architecture for an integrated circuit memory
09/16/2010US20100232240 Columnar replacement of defective memory cells
09/16/2010US20100232223 Defective block handling method for a multiple data channel flash memory storege device
09/16/2010US20100232218 Method of testing pram device
09/15/2010EP2227813A2 Method and apparatus of automatically selecting error correction algorithms
09/15/2010CN101836261A Semiconductor memory device and method for controlling the same
09/15/2010CN101836258A Daisy-chain memory configuration and usage
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