| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 07/07/2011 | US20110164450 Integrated circuits and methods to compensate for defective non-volatile embedded memory in one or more layers of vertically stacked non-volatile embedded memory |
| 07/07/2011 | DE102006031862B4 Strombegrenzungsschaltung und Halbleiterspeichervorrichtung Current limiting circuit and semiconductor memory device |
| 07/06/2011 | EP2100308B1 Method and semiconductor memory with a device for detecting addressing errors |
| 07/06/2011 | CN102119426A Test module and test method |
| 07/06/2011 | CN102117662A Error correction mechanisms for 8-bit memory devices |
| 07/06/2011 | CN102117661A Method and apparatus for customizable error correction of memory |
| 07/06/2011 | CN102117660A 数据存储装置测试仪 The data storage device tester |
| 07/06/2011 | CN102117236A Enabling an integrated memory controller to transparently work with defective memory devices |
| 07/05/2011 | US7975207 Apparatus and method for recording data in information recording medium to which extra ECC is applied or reproducing data from the medium |
| 07/05/2011 | US7975206 Information recording device and method, information reproducing device and method, recording medium, program, and disc recording medium |
| 07/05/2011 | US7975205 Error correction algorithm selection based upon memory organization |
| 07/05/2011 | US7975193 Solid state storage end of life prediction with correction history |
| 07/05/2011 | US7975192 Reading memory cells using multiple thresholds |
| 07/05/2011 | US7975191 Nonvolatile memory device comprising a programming and deletion checking option |
| 07/05/2011 | US7975164 DDR memory controller |
| 07/05/2011 | US7975098 Recording medium with status information thereon which changes upon reformatting and apparatus and methods for forming, recording, and reproducing the recording medium |
| 06/30/2011 | WO2011077624A1 Semiconductor device |
| 06/30/2011 | WO2011076259A1 Tapped transmission line structure, test board, automated test equipment and method for providing signals to a plurality of devices |
| 06/30/2011 | WO2011019596A3 Controller and method for interfacing between a host controller in a host and a flash memory device |
| 06/30/2011 | US20110161784 Method and Controller for Performing a Copy-Back Operation |
| 06/30/2011 | US20110161761 Probeless testing of pad buffers on wafer |
| 06/30/2011 | US20110161753 Semiconductor memory apparatus including data compression test circuit |
| 06/30/2011 | US20110161752 Robust memory link testing using memory controller |
| 06/30/2011 | US20110161751 Semiconductor integrated circuit with memory repair circuit |
| 06/30/2011 | US20110161750 Pre-Code Device, and Pre-Code System and Pre-Coding Method Thereof |
| 06/30/2011 | US20110158018 Structure and Methods for Measuring Margins in an SRAM Bit |
| 06/30/2011 | US20110158017 Method for memory cell characterization using universal structure |
| 06/30/2011 | US20110158016 Integrated solution for identifying malfunctioning components within memory devices |
| 06/30/2011 | US20110158015 Device and method for generating test mode signal |
| 06/30/2011 | US20110158014 Burst address generator and test apparatus including the same |
| 06/30/2011 | US20110158013 Fuse set of semiconductor memory and repair determination circuit using the same |
| 06/30/2011 | US20110158012 Semiconductor memory device having redundancy circuit for repairing defective unit cell |
| 06/30/2011 | US20110158004 Semiconductor device capable of detecting defect of column selection line |
| 06/30/2011 | US20110157985 Nonvolatile semiconductor memory device |
| 06/30/2011 | US20110157969 Semiconductor memory apparatus, and circuit and method for controlling faulty address therein |
| 06/29/2011 | CN201887750U ECC (Error Correction Code) decoder |
| 06/29/2011 | CN102113058A Programmable memory repair scheme |
| 06/29/2011 | CN102110483A Test circuit of EEPROM (electrically erasable programmable read-only memory) and test method thereof |
| 06/29/2011 | CN102110482A Repair circuit and repair method of semiconductor apparatus |
| 06/29/2011 | CN102110481A Semiconductor memory system having ECC circuit and method of controlling thereof |
| 06/29/2011 | CN102110480A Device and method for generating test mode signal |
| 06/29/2011 | CN102110479A Semiconductor memory apparatus including data compression test circuit |
| 06/29/2011 | CN101373641B Memory and one bit reading error detection method |
| 06/28/2011 | US7971126 Apparatus, system, and method for hard disk drive redundancy |
| 06/28/2011 | US7971124 Apparatus and method for distinguishing single bit errors in memory modules |
| 06/28/2011 | US7971123 Multi-bit error correction scheme in multi-level memory storage system |
| 06/28/2011 | US7971114 Method for testing a memory device |
| 06/28/2011 | US7971113 Method for detecting disturb phenomena between neighboring blocks in non-volatile memory |
| 06/28/2011 | US7971112 Memory diagnosis method |
| 06/28/2011 | US7971111 Automated scan testing of DDR SDRAM |
| 06/28/2011 | US7970996 Concentrated parity technique for handling double failures and enabling storage of more than one parity block per stripe on a storage device of a storage array |
| 06/28/2011 | US7970993 Rotating parity redundant array of independent disk and method for storing parity the same |
| 06/28/2011 | US7970988 Recording medium with status information thereon which changes upon reformatting and apparatus and methods for forming, recording, and reproducing the recording medium |
| 06/28/2011 | US7970985 Adaptive deterministic grouping of blocks into multi-block units |
| 06/28/2011 | US7969810 256 Meg dynamic random access memory |
| 06/23/2011 | US20110154138 Failure analysis method, failure analysis apparatus, and computer program product |
| 06/23/2011 | US20110149665 Circuit for controlling redundancy in semiconductor memory apparatus |
| 06/23/2011 | US20110149664 Word line block/select circuit with repair address decision unit |
| 06/22/2011 | EP2337030A1 Maintenance operations for multi-level data storage cells |
| 06/22/2011 | DE10141026B4 Verfahren zum Testen von zu testenden Speichereinheiten und Testeinrichtung A method for testing memory units to be tested and testing device |
| 06/22/2011 | CN102103893A Device for generating test pattern of memory wafer and method thereof |
| 06/22/2011 | CN101361137B Method and apparatus for recording high-speed input data into a matrix of memory devices |
| 06/22/2011 | CN101131999B Semiconductor integrated circuit and testing method of same |
| 06/21/2011 | US7966547 Multi-bit error correction scheme in multi-level memory storage system |
| 06/21/2011 | US7966532 Method for selectively retrieving column redundancy data in memory device |
| 06/21/2011 | US7966531 Memory diagnosis apparatus |
| 06/21/2011 | US7966530 Methods, devices, and systems for experiencing reduced unequal testing degradation |
| 06/21/2011 | US7966529 System and method for testing memory blocks in an SOC design |
| 06/21/2011 | US7966520 Software licensing for spare processors |
| 06/21/2011 | US7965552 Non-volatile semiconductor memory device |
| 06/16/2011 | WO2011008451A3 System and method responsive to a rate of change of a performance parameter of a memory |
| 06/16/2011 | US20110145774 Testing embedded memories in an integrated circuit |
| 06/16/2011 | US20110145664 Test module and test method |
| 06/16/2011 | US20110141835 Circuit and method for testing multi-device systems |
| 06/16/2011 | US20110141823 Semiconductor memory device and method for controlling the same |
| 06/16/2011 | US20110141813 Use of emerging non-volatile memory elements with flash memory |
| 06/16/2011 | US20110141794 Semiconductor memory device and inspecting method of the same |
| 06/16/2011 | DE102010050957A1 Verfahren und Vorrichtung zur Fehlerkorrektur in einem Speicher Method and apparatus for error correction in a memory |
| 06/16/2011 | DE102010049322A1 Befehlssatzachitektur für programmierbare CRC-(zyklische Blockprüfung, cyclic redundancy check)- Berechnungen Befehlssatzachitektur for programmable CRC (cyclic redundancy check cyclic redundancy check) - Calculations |
| 06/16/2011 | DE10196635B4 Speichermodul und in eine Speicherkomponente eingebaute Selbstprüfung Memory module and built-in memory component self-examination |
| 06/15/2011 | EP2333781A1 Maintenance operations for multi-level data storage cells |
| 06/15/2011 | CN1754101B Method and apparatus for detecting an unused state in a semiconductor circuit |
| 06/15/2011 | CN1622221B Apparatus and method of analyzing magnetic random access memory |
| 06/15/2011 | CN102099700A Testing device |
| 06/15/2011 | CN102097133A System and method for testing reliability of mass storage system |
| 06/15/2011 | CN101389970B Dual-path, multimode sequential storage element |
| 06/14/2011 | US7962832 Method for detecting memory error |
| 06/14/2011 | US7962831 Multi-level cell memory device and method thereof |
| 06/14/2011 | US7962830 Method and system for routing in low density parity check (LDPC) decoders |
| 06/14/2011 | US7962823 System and method for testing multiple packet data transmitters |
| 06/14/2011 | US7962810 Recording medium structure capable of displaying defect rate |
| 06/14/2011 | US7962809 Method and apparatus for improving memory operation and yield |
| 06/14/2011 | US7962807 Semiconductor storage apparatus managing system, semiconductor storage apparatus, host apparatus, program and method of managing semiconductor storage apparatus |
| 06/14/2011 | US7962784 Repairable block redundancy scheme |
| 06/14/2011 | US7961536 Memory device and methods thereof |
| 06/14/2011 | US7961535 Test circuit and method for use in semiconductor memory device |
| 06/14/2011 | US7961530 Semiconductor device including nonvolatile memory |
| 06/09/2011 | WO2011067892A1 Semiconductor memory device |
| 06/09/2011 | WO2011066758A1 Method and system for testing access time delay of memory |
| 06/09/2011 | US20110134707 Block isolation control circuit |