Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
11/2010
11/10/2010CN1941210B Semiconductor memory device
11/10/2010CN101882472A Flash memory with variable error-correcting code mechanism and control method thereof
11/10/2010CN101882471A Device and method for detecting word line defect
11/10/2010CN101882467A Memory control device with configurable ECC (Error Correction Code) parameter
11/10/2010CN101458968B Method and device for obtaining disabled binary digit distribution information in non-volatile memory
11/09/2010US7831889 Method and device for error detection for a cache memory and corresponding cache memory
11/09/2010US7831872 Test circuit and method for multilevel cell flash memory
11/09/2010US7831871 Testing embedded memories in an integrated circuit
11/09/2010US7831870 JTAG controlled self-repair after packaging
11/09/2010US7831869 DDS logical data grouping
11/09/2010US7830737 SMI memory read data capture margin characterization circuits and methods
11/09/2010US7830736 Semiconductor integrated circuit device and redundancy method thereof
11/09/2010US7830735 Asynchronous, high-bandwidth memory component using calibrated timing elements
11/09/2010US7830710 Semiconductor memory device
11/04/2010US20100281315 Memory channel with bit lane fail-over
11/04/2010US20100277995 Semiconductor memory device capable of optimizing signal transmission power and power initializing method thereof
11/04/2010DE10330593B4 Integrierter Taktversorgungsbaustein für ein Speichermodul, Speichermodul, welches den integrierten Taktversorgungsbaustein umfasst, sowie Verfahren zum Betreiben des Speichermoduls unter Testbedingungen Integrated clock supply module for a memory module, memory module, which includes the integrated clock supply module, and method of operating the memory module under test conditions
11/03/2010CN101877248A Semiconductor integrated circuit, information processing apparatus and output data diffusion method
11/03/2010CN101877247A Runtime programmable BIST for testing a multi-port memory device
11/03/2010CN101127246B Electric fuse circuit and electronic component
11/02/2010US7827469 Method of implementing XOR based RAID algorithms
11/02/2010US7827468 Memory system including nonvolatile memory and volatile memory and operating method of same
11/02/2010US7827455 System and method for detecting glitches on a high-speed interface
11/02/2010US7827454 Semiconductor device
11/02/2010US7827450 Defect detection and handling for memory based on pilot cells
11/02/2010US7827372 Intergrated circuit and a method of cache remapping
11/02/2010US7826996 Memory-daughter-card-testing apparatus and method
11/02/2010US7826288 Device threshold calibration through state dependent burn-in
11/02/2010US7826287 Testing non-volatile memory devices for charge leakage
11/02/2010US7826286 Semiconductor memory device with redundancy circuit
11/02/2010US7826285 Memory column redundancy scheme
11/02/2010US7826244 Low cost high density rectifier matrix memory
10/2010
10/28/2010US20100275074 Runtime programmable bist for testing a multi-port memory device
10/28/2010US20100275073 Method and device for bad-block testing
10/28/2010US20100271891 Accessing Memory Cells in a Memory Circuit
10/27/2010EP2243141A1 Three-terminal multiple-time programmable memory bitcell and array architecture
10/27/2010EP1222545B1 Method and circuit configuration for storing data words in a ram module
10/27/2010CN101872649A Test method of one-time programmable resistance memory
10/27/2010CN101409109B System for testing and recording automation storage die set
10/27/2010CN101295537B Reading operation control method of memory body
10/27/2010CN101290804B Analyzer with built-in backup element and analysis method of backup element
10/26/2010US7823048 Buffering of data from a data stream having error correction elements
10/26/2010US7823046 Semiconductor device
10/26/2010US7823045 Error correction apparatus and method thereof
10/26/2010US7823044 Method for streamlining error connection code computation while reading or programming a NAND flash memory
10/26/2010US7823033 Data processing with configurable registers
10/26/2010US7823031 Method and system for testing semiconductor memory device using internal clock signal of semiconductor memory device as data strobe signal
10/26/2010US7823030 Improving the yield and/or operation of embedded and external memory circuits; a control module selectively transfers data ina memory block to the second memory and stores and retrieves data from the second memory for one of thememory blocks based on the relationship during the testing
10/26/2010US7823025 Method and apparatus for testing a memory device
10/26/2010US7823024 Memory hub tester interface and method for use thereof
10/26/2010US7822965 BIOS file switching method and controller device thereof
10/26/2010US7821862 Semiconductor memory circuit
10/26/2010US7821855 Multi-port memory device
10/26/2010US7821854 Semiconductor memory
10/26/2010US7821852 Write driving circuit
10/26/2010US7821829 Nonvolatile memory device including circuit formed of thin film transistors
10/26/2010US7821226 Method for the allocation of addresses in the memory cells of a rechargeable energy accumulator
10/26/2010US7820469 Stress-controlled dielectric integrated circuit
10/21/2010WO2010085647A3 Memory devices and methods for managing error regions
10/21/2010US20100269001 Testing system and method thereof
10/21/2010US20100269000 Methods and apparatuses for managing bad memory cell
10/21/2010US20100268999 Memory testing with snoop capabilities in a data processing system
10/21/2010US20100265756 Ferroelectric Memory Bake for Screening and Repairing Bits
10/20/2010CN201611577U 一种存储设备和存储设备上的数据校验系统 Data validation system for storage devices and storage devices
10/20/2010CN101868834A Memory efficient check of RAID information
10/20/2010CN101866698A Secure flash memory using error correcting code circuitry
10/20/2010CN101866319A Method for accessing storing device and relevant control circuit
10/19/2010US7818646 Expectation based event verification
10/19/2010US7818639 Fully-buffered dual in-line memory module with fault correction
10/19/2010US7818638 Systems and devices including memory with built-in self test and methods of making and using the same
10/19/2010US7818637 Apparatus for formatting information storage medium
10/19/2010US7818636 Method and apparatus for improving memory operation and yield
10/19/2010US7818526 Semiconductor memory device having test mode for data access time
10/19/2010US7817485 Memory testing system and memory module thereof
10/19/2010US7817480 Nonvolatile memory
10/14/2010WO2010115332A1 Method for using bad blocks of flash memory
10/14/2010WO2010078540A4 Spare block management in non-volatile memories
10/14/2010US20100262875 System, method, and computer program product for determining a retention behavior for at least one block of a memory device having finite endurance and/or retention
10/14/2010US20100260001 Memory device and methods thereof
10/13/2010EP1978527B1 Tester
10/13/2010CN1791942B Testing ram address decoder for resistive open defects
10/13/2010CN101861626A Method for testing a main memory
10/13/2010CN101859773A Circuit and method for improving radiation reinforcement degree of memory element
10/13/2010CN101859607A Main board and system for memory mounting test
10/13/2010CN101859606A Method and equipment for adjusting reference unit threshold parameter and testing system
10/13/2010CN101859605A Method using flaw flash memory
10/13/2010CN101859604A Utilization method of flash memory bad block
10/13/2010CN101859594A Self-timing write tracking type static random memory integrated with weak write test function and calibration method thereof
10/13/2010CN101858956A Ageing test system
10/13/2010CN101013602B Semiconductor storage device
10/12/2010US7814396 Apparatus and method for checking an error recognition functionality of a memory circuit
10/12/2010US7814395 Rewrite strategy and methods and systems for error correction in high-density recording
10/12/2010US7814384 Electrical diagnostic circuit and method for the testing and/or the diagnostic analysis of an integrated circuit
10/12/2010US7814382 Fully-buffered dual in-line memory module with fault correction
10/12/2010US7814381 Semiconductor memory device
10/12/2010US7814380 Built-in self test (BIST) architecture having distributed interpretation and generalized command protocol
10/12/2010US7814379 Memory module packaging test system
10/12/2010US7814378 Verification of memory consistency and transactional memory
10/12/2010US7814377 Non-volatile memory system with self test capability
10/12/2010US7814361 System and method for synchronizing redundant data in a storage array
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