Patents
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
02/2011
02/01/2011US7881136 Test mode signal generator for semiconductor memory and method of generating test mode signals
02/01/2011US7881135 Method for QCRIT measurement in bulk CMOS using a switched capacitor circuit
02/01/2011US7881134 Replacing defective columns of memory cells in response to external addresses
02/01/2011US7881133 Method of managing a flash memory and the flash memory
02/01/2011US7881032 Method and apparatus providing final test and trimming for a power supply controller
02/01/2011US7881026 Semiconductor integrated circuit
01/2011
01/29/2011CA2707914A1 Operation frequency adjusting system and method
01/27/2011WO2011010445A1 A lower energy comsumption and high speed computer without the memory bottleneck
01/27/2011US20110022913 Nonvolatile memory
01/27/2011US20110022905 Test Circuit and Method for Multilevel Cell Flash Memory
01/27/2011US20110022901 Method for testing hard disks under an extensible firmware interface
01/27/2011US20110022898 Non-volatile memory system with self test capability
01/27/2011US20110019492 Test device and test method for resistive random access memory and resistive random access memory device
01/27/2011US20110019491 Redundancy system for non-volatile memory
01/27/2011US20110019490 Semiconductor memory
01/27/2011US20110019466 Stuck-At Defect Condition Repair for a Non-Volatile Memory Cell
01/27/2011US20110019455 Low cost high density rectifier matrix memory
01/27/2011DE10201573B4 Redundanter Decoderschaltkreis, zugehöriges Speicherbauelement sowie Zugriffs- und Testverfahren Redundant decoder circuit memory device and associated access and test methods
01/26/2011EP2278474A1 Method and apparatus for coordinating memory operations among diversely-located memory components
01/26/2011EP2278471A1 Moving sectors within a block in a flash memory
01/26/2011EP1568038B1 A method and device to detect the likely onset of thermal relaxation in magnetic data storage devices
01/26/2011CN201725591U Automatically coding, calibrating and testing instrument of battery management chip
01/26/2011CN201725590U Hard disc interface detection circuit
01/26/2011CN1722306B Method of testing a memory module and hub of the memory module
01/26/2011CN101960723A Chien search device and Chien search method
01/26/2011CN101960532A Systems, methods, and apparatuses to save memory self-refresh power
01/26/2011CN101036131B Memory transaction burst operation and memory components supporting temporally multiplexed error correction coding
01/25/2011US7877669 Non-volatile memory with error detection
01/25/2011US7877668 Memory access system
01/25/2011US7877666 Tracking health of integrated circuit structures
01/25/2011US7877665 Page by page ECC variation in a memory device
01/25/2011US7877649 Method and apparatus for testing a memory chip using a common node for multiple inputs and outputs
01/25/2011US7876652 Disc recording medium, disc drive apparatus, and reproduction method
01/25/2011US7876633 Integrated circuit including built-in self test circuit to test memory and memory test method
01/25/2011CA2360897C Column redundancy for content addressable memory
01/20/2011WO2011009139A1 Simple nonautonomous peering media clone detection
01/20/2011WO2011007708A1 Measurement device and measurement method
01/20/2011WO2011007383A1 Test device and method for analyzing refief
01/20/2011WO2010129127A3 A runtime programmable bist for testing a multi-port memory device
01/20/2011US20110013470 Structure and Method for Screening SRAMS
01/20/2011US20110013469 Redundancy circuits and semiconductor memory devices
01/20/2011US20110013453 Nonvolatile memory device including circuit formed of thin film transistors
01/19/2011EP2276035A2 Multi-layer memory chip with interlayer connections
01/19/2011EP2275943A1 Method and apparatus for coordinating memory operations among diversely-located memory components
01/19/2011EP2274746A1 Non-volatile multilevel memory with adaptive setting of reference voltage levels for program, verify and read
01/19/2011CN1953102B Test data reporting and analyzing method and system
01/19/2011CN101950586A Storage controller and method for controlling data reading
01/18/2011US7873896 High performance pulsed storage circuit
01/18/2011US7873895 Memory subsystems with fault isolation
01/18/2011US7873883 Method for scrubbing storage in a computer memory
01/18/2011US7873882 Circuits and methods for repairing defects in memory devices
01/18/2011US7872931 Integrated circuit with control circuit for performing retention test
01/18/2011US7872930 Testing a memory device having field effect transistors subject to threshold voltage shifts caused by bias temperature instability
01/18/2011US7872929 Accessing memory cells in a memory circuit
01/13/2011WO2011005663A1 Bad column management with bit information in non-volatile memory systems
01/13/2011WO2011004448A1 Semiconductor storage device and method for manufacturing same
01/13/2011US20110010698 Test partitioning for a non-volatile memory
01/13/2011US20110010583 Error detection, documentation, and correction in a flash memory device
01/13/2011US20110007589 Integrated circuits and methods to compensate for defective non-volatile embedded memory in one or more layers of vertically stacked non-volatile embedded memory
01/13/2011US20110007588 Defective Bit Scheme for Multi-Layer Integrated Memory Device
01/13/2011US20110007542 Testing one time programming devices
01/13/2011US20110007539 Test mode for multi-chip integrated circuit packages
01/13/2011DE19953784B4 Variable Lastschaltung, variable Signalübertragungsschaltung und Signalübertragungssteuerverfahren für integrierte Schaltkreise Variable load circuit, variable signal transmission circuit and signal transmission control method for integrated circuits
01/13/2011DE112008003409T5 Redundante Bitmuster für die Spaltendefekt-Codierung Redundant bit pattern for column defects coding
01/12/2011EP2273376A1 Method and apparatus for coordinating memory operations among diversely-located memory components
01/12/2011EP1036364B1 Alignment of cluster address to block addresses within a semiconductor non-volatile mass storage memory
01/12/2011CN201707929U Pressing and positioning position with slide cover
01/12/2011CN201707928U Current detection circuit
01/12/2011CN101946239A Semiconductor storage device, method of controlling the same, and error correction system
01/12/2011CN101944392A Test system of PROM
01/12/2011CN101944391A Test method of one time programmable read-only memory and one time programmable read-only memory
01/12/2011CN101944390A Semiconductor memory apparatus and data write method of the same
01/12/2011CN101944389A Detection method and device of electronic product
01/12/2011CN101944386A Control circuit and storage system and method for identifying error data in flash memory
01/11/2011US7870464 System and method for recovery of data for a lost sector in a storage system
01/11/2011US7870463 Optical disc recording and playback apparatus
01/11/2011US7870446 Information processing apparatus and nonvolatile semiconductor memory drive
01/11/2011US7870435 Memory device and method for repairing a semiconductor memory
01/11/2011US7868706 Oscillator device and methods thereof
01/11/2011US7868620 Data integrity management responsive to an electrostatic event
01/06/2011WO2011002621A1 Computer memory test structure
01/06/2011WO2011001562A1 Semiconductor integrated circuit
01/06/2011US20110004807 Loading secure code into a memory
01/06/2011US20110004795 Method for enhancing verification efficiency regarding an error handling mechanism of a controller of a flash memory, and associated memory device and controller thereof
01/06/2011US20110004794 Semiconductor memory device
01/06/2011US20110004793 Computer memory test structure
01/06/2011US20110002170 Semiconductor memory device having memory block configuration
01/06/2011US20110002169 Bad Column Management with Bit Information in Non-Volatile Memory Systems
01/06/2011US20110002153 Manufacturing method for stacking memory circuits and for addressing a memory circuit, corresponding stacking and device
01/06/2011US20110002152 Systems, memories, and methods for repair in open digit memory architectures
01/05/2011EP2270663A1 Method and apparatus for dealing with write errors when writing information data into flash memory devices
01/05/2011EP2270662A1 Method and apparatus for dealing with write errors when writing information data into flash memory devices
01/05/2011EP2269139A1 Memory system
01/05/2011DE102010030748A1 Bitfehlerschwelle und Umabbildung einer Speicheranordnung Bitfehlerschwelle and remapping a memory array
01/05/2011DE102010030745A1 Nicht-flüchtiger Speicher zum Speichern von Speicher-Umabbildungs-Informationen Non-volatile memory for storing memory information Umabbildungs
01/05/2011CN101939835A An integrated circuit with a memory matrix with a delay monitoring column
01/05/2011CN101939792A Redundant bit patterns for column defects coding
01/05/2011CN101939790A External I/O signal and DRAM refresh signal synchronization method and its circuit
01/05/2011CN101937726A Fast data eye retraining for a memory
01/05/2011CN101937725A Bit error threshold and content addressable memory to address a remapped memory device
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