| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 03/03/2011 | US20110055645 Semiconductor test method, semiconductor test apparatus, and computer readable medium |
| 03/03/2011 | US20110055644 Centralized mbist failure information |
| 03/03/2011 | US20110055509 Control component for controlling a delay interval within a memory component |
| 03/03/2011 | US20110051541 Semiconductor device |
| 03/03/2011 | US20110051540 Method and structure for SRAM cell trip voltage measurement |
| 03/03/2011 | US20110051539 Method and structure for SRAM VMIN/VMAX measurement |
| 03/03/2011 | US20110051538 Methods and memory devices for repairing memory cells |
| 03/03/2011 | US20110051523 Small unit internal verify read in a memory device |
| 03/03/2011 | US20110051502 Flexible Word-Line Pulsing For STT-MRAM |
| 03/03/2011 | DE102009028871A1 Method for testing memory e.g. RAM memory, of function testing system for switching off of electrical vehicle drive, involves executing memory testing routine after cycle of predetermined time intervals |
| 03/02/2011 | EP2289071A1 Testing a memory device having field effect transistors subject to threshold voltage shifts caused by bias temperature instability |
| 03/02/2011 | EP1997112B1 Adjusting a digital delay function of a data memory unit |
| 03/02/2011 | EP1766529B1 Multiple-core processor with support for multiple virtual processors |
| 03/01/2011 | US7900120 Memory system and method using ECC with flag bit to identify modified data |
| 03/01/2011 | US7900119 Interleaving redundancy apparatus and method |
| 03/01/2011 | US7900118 Flash memory system and method for controlling the same |
| 03/01/2011 | US7900106 Accessing sequential data in a microcontroller |
| 03/01/2011 | US7900102 High-speed programming of memory devices |
| 03/01/2011 | US7900101 Semiconductor memory device parallel bit test circuits |
| 03/01/2011 | US7900100 Uncorrectable error detection utilizing complementary test patterns |
| 03/01/2011 | US7900099 Enabling test modes of individual integrated circuit devices out of a plurality of integrated circuit devices |
| 03/01/2011 | US7900097 Method of de-interleaving interleaved data samples sequences, and associated system |
| 03/01/2011 | US7898882 Architecture, system and method for compressing repair data in an integrated circuit (IC) design |
| 02/24/2011 | WO2010093441A8 Automatic refresh for improving data retention and endurance characteristics of an embedded non-volatile memory in a standard cmos logic process |
| 02/24/2011 | US20110047422 Non-volatile memory cell read failure reduction |
| 02/24/2011 | US20110047421 Nand flash-based storage device with built-in test-ahead for failure anticipation |
| 02/24/2011 | US20110044119 Semiconductor Device having variable parameter selection based on temperature and test method |
| 02/23/2011 | EP2286412A1 Flash memory timing pre-characterization for use in ormal operation |
| 02/23/2011 | CN101980339A Error correction encoding method for dynamic random access memory (DRAM) buffer |
| 02/22/2011 | US7895502 Error control coding methods for memories with subline accesses |
| 02/22/2011 | US7895485 System and method for testing a packetized memory device |
| 02/22/2011 | US7895484 Semiconductor device, memory system and control method of the semiconductor device |
| 02/22/2011 | US7895483 Software memory leak analysis using memory isolation |
| 02/22/2011 | US7895482 Embedded memory repair |
| 02/22/2011 | US7894284 Ferroelectric memory bake for screening and repairing bits |
| 02/22/2011 | US7894281 Redundancy circuit using column addresses |
| 02/22/2011 | US7894262 Nonvolatile semiconductor storage device having guaranteed and backup blocks |
| 02/22/2011 | US7894259 Nonvolatile semiconductor memory device with first and second write sequences controlled by a command or an address |
| 02/17/2011 | WO2011019794A2 Method and apparatus for addressing actual or predicted failures in a flash-based storage system |
| 02/17/2011 | US20110041038 Dynamic electronic correction code feedback to extend memory device lifetime |
| 02/17/2011 | US20110038218 Memory Chip and Method for Operating the Same |
| 02/16/2011 | EP2285002A2 Antifuse reroute of dies |
| 02/16/2011 | EP1704571B1 Non-volatile memory and method with block management system |
| 02/16/2011 | CN201749694U Detection device of vehicle media player |
| 02/16/2011 | CN101976584A Quasi-cyclic low density parity-check code (QC-LDPC) decoder and decoding method |
| 02/16/2011 | CN101976583A Polarity driven dynamic on-die termination |
| 02/16/2011 | CN101976582A Storage modeling method and device |
| 02/16/2011 | CN101183565B Data verification method for storage medium |
| 02/15/2011 | US7890838 Storage apparatus having nonvolatile storage module |
| 02/15/2011 | US7890827 Compressing test responses using a compactor |
| 02/15/2011 | US7890822 Tester input/output sharing |
| 02/15/2011 | US7890820 Semiconductor test system with self-inspection of memory repair analysis |
| 02/15/2011 | US7890819 Method and apparatus for storing failing part locations in a module |
| 02/15/2011 | US7889583 Memory circuit and tracking circuit thereof |
| 02/10/2011 | US20110035637 Systems and devices including memory with built-in self test and methods of making and using the same |
| 02/10/2011 | US20110035636 Data storage device and method for writing test data to a memory |
| 02/10/2011 | US20110032782 Test method and device for memory device |
| 02/10/2011 | US20110032781 Memory device and memory control method |
| 02/10/2011 | US20110032777 Semiconductor memory circuit |
| 02/09/2011 | CN1637939B Semiconductor memory apparatus |
| 02/09/2011 | CN1624806B Reference voltage detector for power-on sequence in a memory |
| 02/09/2011 | CN101971265A Methods for manufacturing a stack of memory circuits and for addressing a memory circuit, corresponding stack and device |
| 02/09/2011 | CN101373639B Memory time sequence measuring circuit and test method thereof |
| 02/09/2011 | CN101154448B Page buffer circuit of memory device and program method |
| 02/08/2011 | US7886212 NAND flash memory controller exporting a NAND interface |
| 02/08/2011 | US7886211 Memory controller |
| 02/08/2011 | US7886206 Semiconductor memory test device and method thereof |
| 02/08/2011 | US7886205 Verification of a data processing system using overlapping address ranges |
| 02/08/2011 | US7886203 Method and apparatus for bit interleaving and deinterleaving in wireless communication systems |
| 02/08/2011 | US7885129 Memory chip and method for operating the same |
| 02/08/2011 | US7885128 Redundant memory array for replacing memory sections of main memory |
| 02/03/2011 | WO2011011871A1 Redundancy system for non-volatile memory |
| 02/03/2011 | US20110029837 Systems and Methods for Phase Dependent Data Detection in Iterative Decoding |
| 02/03/2011 | US20110029827 Method, apparatus, and design structure for built-in self-test |
| 02/03/2011 | US20110029807 Implementing enhanced memory reliability using memory scrub operations |
| 02/03/2011 | US20110026343 Bist ddr memory interface circuit and method for testing the same |
| 02/03/2011 | US20110026342 Multi-port memory device |
| 02/03/2011 | US20110026341 Semiconductor memory apparatus |
| 02/03/2011 | US20110026340 Memory test circuit, semiconductor integrated circuit and memory test method |
| 02/03/2011 | US20110026339 Semiconductor memory device performing refresh operation and method of testing the same |
| 02/03/2011 | US20110026338 Redundancy circuit of semiconductor memory |
| 02/03/2011 | US20110026326 Memory system including flash memory and method of operating the same |
| 02/03/2011 | US20110026295 Semiconductor memory |
| 02/03/2011 | DE19852986B4 Schaltungsanordnung und Verfahren zur Datenmaskierung Circuit arrangement and method for data masking |
| 02/03/2011 | DE10296525B4 Chipinterne Schaltungen für ein Hochgeschwindigkeitsspeichertesten mit einem langsamen Speichertester On-chip circuits for high-speed memory testing with a slow memory tester |
| 02/03/2011 | DE102010030750A1 Bitfehlerschwelle und inhaltsadressierbarer Speicher zur Adressierung einer umabgebildeten Speichereinheit Bitfehlerschwelle and content addressable memory for addressing a remapped memory unit |
| 02/03/2011 | DE10101999B4 Elektronische Testschaltung und Verfahren für das Testen eines Speicherbausteins Electronic test circuit and method for testing a memory device |
| 02/02/2011 | CN201732584U Device for testing signal integrity of solid state drive |
| 02/02/2011 | CN201732583U Integrated circuit quasi single-hop test vector generator based on linear feedback shift register |
| 02/02/2011 | CN101964213A Test method on failure analysis of storage cell |
| 02/02/2011 | CN101196546B Method for different IP products executing burn-in test and test board used for it |
| 02/01/2011 | US7882420 Method and system for data replication |
| 02/01/2011 | US7882417 Semiconductor memory device and memory system including the same |
| 02/01/2011 | US7882408 Real time feedback compensation of programmable logic memory |
| 02/01/2011 | US7882407 Adapting word line pulse widths in memory systems |
| 02/01/2011 | US7882406 Built in test controller with a downloadable testing program |
| 02/01/2011 | US7882405 Embedded architecture with serial interface for testing flash memories |
| 02/01/2011 | US7882355 Encryption/decryption methods and devices utilizing the same |
| 02/01/2011 | US7882323 Scheduling of background scrub commands to reduce high workload memory request latency |
| 02/01/2011 | US7882314 Efficient scheduling of background scrub commands |