G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation

Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
11/2011
11/10/2011	US20110276846 Uninitialized memory detection using error correction codes and built-in self test
11/10/2011	US20110276845 Methods, apparatus and articles of manufacture to diagnose temperature-induced memory errors
11/10/2011	US20110276844 Methods and system for verifying memory device integrity
11/10/2011	US20110273946 Universal test structures based sram on-chip parametric test module and methods of operating and testing
11/10/2011	US20110273924 Semiconductor memory device
11/09/2011	CN102237146A Repair circuit and repair method of semiconductor memory apparatus
11/09/2011	CN102237145A Clamped storage device and testing method thereof
11/09/2011	CN102237144A Test circuit and semiconductor memory apparatus including the same
11/09/2011	CN102237143A Reconstruction method, system and reconstruction device for block information provided in flash memory
11/09/2011	CN102237142A Automatic coding correcting tester for battery management chip
11/09/2011	CN102236585A Method for improving error correction capacity and related memory device and controller of memory device
11/09/2011	CN101097784B Improving reliability, availability, and serviceability in a memory device
11/09/2011	CN101067965B Write-side calibration for data interface
11/08/2011	US8055979 Flash memory with coding and signal processing
11/08/2011	US8055978 Semiconductor memory system performing data error correction using flag cell array of buffer memory
11/08/2011	US8055963 Accessing sequential data in a microcontroller
11/08/2011	US8055960 Self test apparatus for identifying partially defective memory
11/08/2011	US8055959 Disabling faulty flash memory dies
11/08/2011	US8055958 Replacement data storage circuit storing address of defective memory cell
11/08/2011	US8055957 Semiconductor integrated circuit device having fail-safe mode and memory control method
11/08/2011	US8055956 Built-in self-repairable memory
11/08/2011	US8055946 Semiconductor IC incorporating a co-debugging function and test system
11/08/2011	US8055458 Technique for determining performance characteristics of electronic devices and systems
11/08/2011	US8054704 Semiconductor memory device having a redundancy memory cell array
11/08/2011	US8054696 System and method to improve reliability in memory word line
11/03/2011	WO2011094102A3 Data processing system having brown-out detection circuit
11/03/2011	US20110271158 Method and apparatus for testing high capacity/high bandwidth memory devices
11/03/2011	US20110271157 Test circuit and semiconductor memory apparatus including the same
11/03/2011	US20110271156 Apparatus and method for testing shadow logic
11/03/2011	US20110271155 Method and Apparatus for Measuring Symbol and Bit Error Rates Independent of Disparity Errors
11/03/2011	US20110267911 Semiconductor memory apparatus
11/03/2011	US20110267910 Semiconductor integrated circuit including column redundancy fuse block
11/03/2011	US20110267908 Repair circuit and repair method of semiconductor memory apparatus
11/03/2011	US20110267906 Measuring SDRAM Control Signal Timing
11/03/2011	US20110267899 Non-volatile memory device and non-volatile memory system having the same
11/03/2011	US20110267876 Nonvolatile memory device using variable resistive element
11/03/2011	US20110267875 Semiconductor memory device and method for testing the same
11/02/2011	EP2383750A2 Memory controller and memory management method
11/02/2011	EP2383748A2 Non-volatile memory and method for linear estimation of initial programming voltage
11/02/2011	CN102231286A Test method of DRAM (dynamic random access memory)
11/02/2011	CN101540197B Design method of emptying CTIA reading circuit of photo memory unit
11/02/2011	CN101504923B Semiconductor device, its manufacturing method and its testing method
11/01/2011	US8051361 Method for lock-free clustered erasure coding and recovery of data across a plurality of data stores in a network
11/01/2011	US8051358 Error recovery storage along a nand-flash string
11/01/2011	US8051346 Fault injection
11/01/2011	US8051344 Semiconductor memory testing device and method of testing semiconductor using the same
11/01/2011	US8051343 Method of testing a memory module and hub of the memory module
11/01/2011	US8051342 Semiconductor memory device
11/01/2011	US8051341 Semiconductor memory device having test address generating circuit and method of testing semiconductor memory device having a test address generating circuit
11/01/2011	US8051339 Data preserving method and data accessing method for non-volatile memory
11/01/2011	US8051257 Non-volatile memory and method with control data management
11/01/2011	US8050123 Semiconductor memory device and method of defective cell test by adjusting a bitline reference/precharge level
11/01/2011	US8050122 Fuse apparatus for controlling built-in self stress and control method thereof
11/01/2011	US8049135 Systems and methods for alignment of laser beam(s) for semiconductor link processing
10/2011
10/27/2011	WO2011132352A1 Testing device and testing method
10/27/2011	WO2011109487A8 Method and apparatus for testing a memory device
10/27/2011	US20110264969 Semiconductor integrated circuit device
10/27/2011	US20110261639 Semiconductor memory circuit
10/27/2011	US20110261628 256 Meg dynamic random access memory
10/27/2011	US20110261617 Semiconductor memory device having memory block configuration
10/27/2011	US20110260224 Thin film magnetic memory device capable of conducting stable data read and write operations
10/26/2011	CN1614717B Method of detecting errors in a priority encoder and a content addressable memory adopting the same
10/26/2011	CN102227779A Error correction in multiple semiconductor memory units
10/26/2011	CN102226947A Controllable test vector generator based on linear feedback shift register
10/26/2011	CN101540192B Method and device for preventing data loss in reflow process
10/26/2011	CN101226777B Storage apparatus and apparatus with reduced test stitch as well as test approach thereof
10/25/2011	US8046665 Memory device employing dual clocking for generating systematic code and method thereof
10/25/2011	US8046664 Information processing apparatus and program for controlling the same
10/25/2011	US8046647 TAP sampling at double rate
10/25/2011	US8046646 Defective memory block identification in a memory device
10/25/2011	US8046645 Bad block identifying method for flash memory, storage system, and controller thereof
10/25/2011	US8046644 DRAM testing method
10/25/2011	US8046643 Transport subsystem for an MBIST chain architecture
10/25/2011	US8046642 TCAM BIST with redundancy
10/25/2011	US8045415 Memory devices having programmable elements with accurate operating parameters stored thereon
10/25/2011	US8045408 Semiconductor integrated circuit with multi test
10/25/2011	US8045405 Memory system, memory device and command protocol
10/20/2011	WO2011130025A2 Test architecture including cyclical cache chains, selective bypass scan chain segments, and blocking circuitry
10/20/2011	US20110258497 Utilization of memory refresh cycles for pattern matching
10/20/2011	US20110255357 Dynamic random access memory (dram) refresh
10/19/2011	CN202013747U Testing socket for transferring protection for memory chip
10/19/2011	CN102222526A Method and device for controlling treatment process of electronic apparatus
10/19/2011	CN101499316B Flash memory block management method and controller employing the same
10/19/2011	CN101477837B Detection method and apparatus for memory capacity
10/19/2011	CN101409110B Storage module for repairing defect storage unit cell and repairing method thereof
10/19/2011	CN101383189B Method for testing memory
10/19/2011	CN101154461B Nonvolatile semiconductor memory device
10/18/2011	US8042023 Memory system with cyclic redundancy check
10/18/2011	US8042022 Method, system, and apparatus for distributed decoding during prolonged refresh
10/18/2011	US8042021 Memory card and memory controller
10/18/2011	US8042020 Data error correction circuit, integrated circuit for data error correction, and method of performing data error correction
10/18/2011	US8042015 High-speed semiconductor memory test device
10/18/2011	US8042013 Semiconductor device and verify method for semiconductor device
10/18/2011	US8042012 Systems and devices including memory with built-in self test and methods of making and using the same
10/18/2011	US8042011 Runtime programmable BIST for testing a multi-port memory device
10/18/2011	US8041936 Persisting value relevant to debugging of computer system during reset of computer system
10/18/2011	US8041531 Burn-in test apparatus
10/18/2011	US8040751 Semiconductor memory device
10/18/2011	US8040744 Spare block management of non-volatile memories
10/18/2011	US8040727 Flash EEprom system with overhead data stored in user data sectors

1 ... 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 ... 306