Patents
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
03/1992
03/19/1992WO1992004717A1 Circuit arrangement for testing a semiconductor store by means of parallel tests with different test bit patterns
03/19/1992WO1992004674A1 Computer memory array control
03/19/1992DE4029247A1 Doppel-port-speichereinrichtung Dual-port memory device
03/18/1992EP0475764A2 Redundant decoder circuit
03/18/1992EP0475590A1 A semiconductor memory with chip enable control from output enable during test mode
03/18/1992EP0475589A1 A semiconductor memory with automatic test mode exit on chip enable
03/18/1992EP0475588A1 A semiconductor memory with inhibited test mode entry during power-up
03/18/1992EP0475346A2 Semiconductor memory device having means for monitoring bias voltage
03/17/1992US5097449 Non-volatile memory structure
03/17/1992US5097448 Semiconductor memory device capable of relieving defective bits
03/17/1992US5097447 Semiconductor memory device having a serial access memory
03/17/1992US5097206 Built-in test circuit for static CMOS circuits
03/12/1992DE4028819A1 Schaltungsanordnung zum testen eines halbleiterspeichers mittels paralleltests mit verschiedenen testbitmustern Circuitry for testing a semiconductor memory using parallel tests with different testbitmustern
03/11/1992EP0474451A2 Method and apparatus for error recovery in storage arrays
03/11/1992EP0275752B1 Integrated circuit having means for switching towards redundant elements in a memory
03/11/1992EP0142127B1 Redundancy circuit for a semiconductor memory device
03/10/1992US5095344 Highly compact eprom and flash eeprom devices
03/04/1992EP0473193A2 Semiconductor device having a temperature detection circuit
03/04/1992EP0472818A2 Built-in self test for integrated circuits
02/1992
02/26/1992EP0472485A2 Data file directories and methods
02/26/1992EP0472266A2 A semiconductor memory with improved test mode
02/26/1992EP0472209A2 Semiconductor memory device having redundant circuit
02/26/1992EP0471935A2 Circuit for supervising a matrix of bistable points
02/25/1992US5091910 Information processing device
02/25/1992US5091908 Built-in self-test technique for read-only memories
02/25/1992US5091884 Semiconductor memory device with improved address discriminating circuit for discriminating an address assigned defective memory cell replaced with redundant memory cell
02/20/1992WO1992002934A1 Integrated memory having improved testing means
02/19/1992EP0471544A2 Semiconductor memory with a sequence of clocked access codes for test mode entry
02/19/1992EP0471543A2 A semiconductor memory with a clocked access code for test mode entry
02/19/1992EP0471542A2 An improved power-on reset circuit for controlling test mode entry
02/19/1992EP0471541A2 A semiconductor memory with multiple clocking for test mode entry
02/19/1992EP0471540A2 A semiconductor memory with a flag for indicating test mode
02/18/1992US5089993 Memory module arranged for data and parity bits
02/18/1992US5089958 Fault tolerant computer backup system
02/18/1992US5089951 Microcomputer incorporating memory
02/18/1992CA1296110C Reconfigurable register bit-slice for self-test
02/12/1992EP0470897A1 Integrated memory circuit with redundancy and improved addressing in test mode
02/12/1992CN1058666A Variable size set associative dram redundancy scheme
02/11/1992US5088081 Method and apparatus for improved disk access
02/11/1992US5088066 Redundancy decoding circuit using n-channel transistors
02/11/1992US5088063 Semiconductor memory device having on-chip test circuit
02/06/1992WO1992001986A1 Improvements relating to chained circuit modules
02/05/1992EP0470030A2 Fast memory power-on diagnostics using direct memory addressing
02/05/1992EP0469705A2 High speed testing for programmable logic devices
02/05/1992EP0469571A2 Redundant semiconductor memory device
02/05/1992EP0469507A1 Integrated circuit comprising a standard cell, an application cell and a test cell
02/05/1992EP0469252A1 Laser link decoder for DRAM redundancy scheme
02/04/1992US5086413 Non-volatile semiconductor memory device having an improved testing mode of operation and method of forming checkerwise test pattern in memory cell array
01/1992
01/29/1992EP0468535A2 Microcomputer having ROM data protection function
01/29/1992EP0468141A2 Memory
01/29/1992EP0378538B1 Arrangement and process for detecting and localizing faulty circuits in a storage component
01/29/1992EP0212547B1 Method and device for refreshing dynamic semiconductor memory device
01/28/1992US5084873 Chip error detector
01/28/1992US5084838 Large-scale integrated circuit device such as a wafer scale memory having improved arrangements for bypassing, redundancy, and unit integrated circuit interconnection
01/23/1992DE4113590A1 Microcomputer with programming unit - contains overwritable, non-volatile memory with gate and selection circuits facilitating program content definition
01/22/1992EP0467638A2 Semiconductor memory device
01/22/1992EP0467448A2 Processing device and method of programming such a processing device
01/22/1992EP0467079A2 Disc array storage system
01/21/1992US5083294 Semiconductor memory device having a redundancy
01/21/1992US5083264 Process and apparatus for saving and restoring critical files on the disk memory of an electrostatographic reproduction machine
01/15/1992EP0466247A1 Stable low-dissipation reference circuit
01/15/1992EP0465808A1 Variable size set associative DRAM redundancy scheme
01/15/1992EP0283907B1 Circuit arrangement and method for testing memory cells
01/15/1992EP0229144B1 Wafer-scale integrated circuit memory
01/10/1992WO1992016946A1 Semiconductor memory having nonvolatile semiconductor memory cell
01/08/1992EP0464577A2 Semiconductor memory device having breaker associated with address decoder circuit for deactivating defective memory cell
01/08/1992CN1057720A Method for multi-bit parallel test in semiconductor memory device
01/07/1992US5079747 Semiconductor memory device having diagnostic unit operable on parallel data bits
01/07/1992US5079744 Test apparatus for static-type semiconductor memory devices
01/07/1992US5079743 Circuit for applying selected voltages to dynamic random access memory
01/02/1992EP0252325B1 Semiconductor device having a fuse circuit and a detecting circuit for detecting the states of the fuses in the fuse circuit
01/01/1992CN1057543A Laser ling decoder for dram redun-dancy scheme
12/1991
12/31/1991US5077744 Method for error protection in telephone switching installations
12/31/1991US5077738 Test mode enable scheme for memory
12/31/1991US5077691 Flash EEPROM array with negative gate voltage erase operation
12/31/1991US5077690 Memory input data test arrangement
12/31/1991US5077689 Method for multi-bit parallel test in semiconductor memory device
12/27/1991EP0462876A1 Circuit for testing electrically programmable memory cells
12/27/1991EP0462743A1 Method and apparatus for accomplishing output-specific data compaction
12/26/1991WO1991020034A1 Data storage system for providing redundant copies of data on different disk drives
12/24/1991US5075892 Parallel read circuit for testing high density memories
12/17/1991US5073891 Method and apparatus for testing memory
12/11/1991EP0460692A2 Semiconductor memory with failure handling circuit
12/10/1991US5072424 Wafer-scale integrated circuit memory
12/10/1991US5072138 Semiconductor memory with sequential clocked access codes for test mode entry
12/10/1991US5072137 Semiconductor memory with a clocked access code for test mode entry
12/04/1991EP0459521A2 Semiconductor memory device with a redundancy circuit
12/04/1991EP0459001A1 Integrated semiconductor memory
12/04/1991EP0214914B1 Test method for detecting faulty memory cells in a programmable semiconductor device
12/04/1991CN1056770A Semiconductor integrated circuit chip having identification circuit therein
12/04/1991CN1015031B Extended flash writing circuit for dram-test
12/03/1991US5070502 Defect tolerant set associative cache
11/1991
11/28/1991DE4026326A1 Integrated circuit chip having identification circuit - has voltage limiter and option unit determining identification by existence of current path, between power and input terminals
11/27/1991EP0457819A1 Fault masking in semiconductor memories
11/27/1991EP0457808A1 Parallel microprocessor architecture
11/21/1991EP0457308A2 Data processing system having an input/output path disconnecting mechanism and method for controlling the data processing system
11/20/1991CN1056361A Method for mode conversion of dual-port memory device
11/20/1991CN1056360A Redundancy scheme for eliminating defects in memory device
11/19/1991US5067105 System and method for automatically configuring translation of logical addresses to a physical memory address in a computer memory system
11/14/1991WO1991017545A1 Integrated semiconductor store with parallel test facility and redundancy process