| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 03/22/1994 | US5297087 Methods and devices for accelerating failure of marginally defective dielectric layers |
| 03/22/1994 | US5297086 Method for initializing redundant circuitry |
| 03/22/1994 | US5297085 Semiconductor memory device with redundant block and cell array |
| 03/17/1994 | WO1994006082A1 Memory circuit with redundancy architecture |
| 03/17/1994 | DE4230615A1 Secure storage of data in EEPROM e.g. in motor vehicle controller - comparing data with check word to ensure that storage cells found to be defective are not used for further operations |
| 03/16/1994 | CN1083971A Burn-in enable circuit of a semiconductor memory device and burn-in test method thereof |
| 03/16/1994 | CN1083962A Semiconductor memory device including multi-ecc circuit |
| 03/15/1994 | US5295255 Method and apparatus for programming a solid state processor with overleaved array memory modules |
| 03/15/1994 | US5295114 Semiconductor memory device with redundant circuit for rescuing from rejection due to large current consumption |
| 03/15/1994 | US5295109 Semiconductor memory |
| 03/15/1994 | US5295102 Semiconductor memory with improved redundant sense amplifier control |
| 03/15/1994 | US5295101 Array block level redundancy with steering logic |
| 03/15/1994 | US5294776 Method of burning in a semiconductor device |
| 03/09/1994 | EP0586114A2 A semiconductor read only memory |
| 03/09/1994 | EP0585870A2 Dynamic random access memory with voltage stress applying circuit |
| 03/09/1994 | EP0585435A1 Transparent testing of integrated circuits |
| 03/08/1994 | US5293598 Random access memory with a plurality of amplifier groups |
| 03/08/1994 | US5293564 Address match scheme for DRAM redundancy scheme |
| 03/08/1994 | US5293561 Write-in voltage source incorporated in electrically erasable programmable read only memory device with redundant memory cell array |
| 03/08/1994 | US5293560 Multi-state flash EEPROM system using incremental programing and erasing methods |
| 03/08/1994 | US5293386 Integrated semiconductor memory with parallel test capability and redundancy method |
| 03/08/1994 | US5293348 Random access memory device with columns of redundant memory cells distributed to memory cell arrays and shared therebetween |
| 03/08/1994 | US5293341 Semiconductor memory having a test function |
| 03/08/1994 | US5293340 Dynamic random access memory device with multiple word line selector used in burn-in test |
| 03/08/1994 | US5293339 Semiconductor integrated circuit containing redundant memory element |
| 03/08/1994 | US5293133 Method of determining an electrical characteristic of an antifuse and apparatus therefor |
| 03/08/1994 | CA1327647C Method for arranging a read memory for reading out updating status information in an integrated circuit |
| 03/03/1994 | WO1994006529A1 Liquid gasification apparatus |
| 03/03/1994 | DE4328605A1 Semiconductor memory for storing several bits at same address - has comparator circuits for determining concordance of data from cell blocks and data at terminal |
| 03/03/1994 | DE4327814A1 Address decoder for repair of memory device - has voltage line connected to multiple repair connections which may be selectively removed by laser beam |
| 03/02/1994 | EP0584832A2 Integrated memory circuit device |
| 03/01/1994 | US5291449 IC memory testing apparatus |
| 03/01/1994 | US5291448 Zone-segregated circuit for the testing of electrically programmable memory cells |
| 03/01/1994 | US5291139 Circuit for detection of the state of an integrated circuit fuse in a balanced fuse configuration |
| 02/22/1994 | US5289475 Semiconductor memory with inverted write-back capability and method of testing a memory using inverted write-back |
| 02/22/1994 | US5289428 Semiconductor memory device |
| 02/22/1994 | US5289417 Semiconductor memory device with redundancy circuit |
| 02/22/1994 | US5289416 Semiconductor integrated device and wiring correction arrangement therefor |
| 02/22/1994 | US5289403 Self-timed content addressable memory access mechanism with built-in margin test feature |
| 02/17/1994 | WO1994003901A1 Fault-tolerant, high-speed bus system and bus interface for wafer-scale integration |
| 02/15/1994 | US5287472 Memory system using linear array wafer scale integration architecture |
| 02/15/1994 | US5287364 Portable semiconductor data storage device |
| 02/15/1994 | US5287363 System for locating and anticipating data storage media failures |
| 02/15/1994 | US5287345 Data handling arrays |
| 02/15/1994 | US5287318 Semiconductor memory |
| 02/15/1994 | US5287315 Skewed reference to improve ones and zeros in EPROM arrays |
| 02/15/1994 | US5287313 Method of testing data-holding capability of a semiconductor memory device |
| 02/15/1994 | US5287312 Dynamic random access memory |
| 02/15/1994 | US5287311 Method and apparatus for implementing ×2 parity DRAM for 16 bit systems from ×4 parity DRAM |
| 02/15/1994 | US5287310 Memory with I/O mappable redundant columns |
| 02/15/1994 | US5287012 Semiconductor integrated circuit equipped with diagnostic circuit for checking reference voltage signal supplied to internal step-down circuit |
| 02/10/1994 | DE4227281C1 Built-in self-test circuit for RAM - has test-controller for setting existing buffer memory into linear feedback shift register, pseudo-random test pattern generator or shift register |
| 02/09/1994 | EP0582370A2 Disk drive controller with a posted write cache memory |
| 02/08/1994 | US5285453 Test pattern generator for testing embedded arrays |
| 02/08/1994 | US5285419 Read/write memory with improved test mode data compare |
| 02/08/1994 | US5285418 Semiconductor device having a temperature detection circuit |
| 02/08/1994 | US5285417 Semiconductor memory device having breaker associated with address decoder circuit for deactivating defective memory cell |
| 02/02/1994 | EP0581602A2 Semiconductor memory device with an error checking and correcting circuit |
| 02/02/1994 | EP0581309A2 Burn-in test enable circuit of a semiconductor memory device and burn-in test method |
| 02/01/1994 | US5283790 External storage apparatus and defective block reassignment processing method therefor |
| 01/27/1994 | DE4132831C2 Halbleiterspeichervorrichtung A semiconductor memory device |
| 01/26/1994 | EP0579993A1 Testing and exercising individual, unsingulated dies on a wafer |
| 01/25/1994 | US5282167 Dynamic random access memory |
| 01/25/1994 | US5282165 Random access memory with redundancy repair circuit |
| 01/25/1994 | US5281868 Memory redundancy addressing circuit for adjacent columns in a memory |
| 01/20/1994 | DE4322994A1 Semiconductor memory device, e.g. DRAM with on-chip test circuit - has resetting device for test mode control providing variable resetting time for initial test mode condition |
| 01/20/1994 | DE4223532A1 Schaltungsanordnung zum Prüfen der Adressierung wenigstens einer Matrix Circuitry for testing the addressing at least one matrix |
| 01/19/1994 | EP0579366A2 Redundancy circuits for semiconductor memory devices |
| 01/19/1994 | EP0579327A2 Integrated matrix memory with an addressing test circuit |
| 01/19/1994 | EP0578935A2 Row redundancy circuit of a semiconductor memory device |
| 01/19/1994 | EP0578876A1 Static random access memory device with memory cell testing circuit |
| 01/19/1994 | EP0366702B1 Integrated circuits |
| 01/19/1994 | CN1081005A Adapter for constructing redundant disk storage system |
| 01/12/1994 | EP0578139A2 Programmable disk drive array controller |
| 01/11/1994 | US5278847 Fault-tolerant memory system with graceful degradation |
| 01/11/1994 | US5278839 Semiconductor integrated circuit having self-check and self-repair capabilities |
| 01/11/1994 | US5278794 NAND-cell type electrically erasable and programmable read-only memory with redundancy circuit |
| 01/11/1994 | US5278793 Memory defect masking device |
| 01/11/1994 | US5278785 Non-volatile memory circuits and architecture |
| 01/06/1994 | WO1994000816A1 Remote dual copy of data in computer systems |
| 01/05/1994 | DE4311120A1 Non-volatile semiconductor memory, e.g. EPROM or EEPROM - has switch elements controlled by selection device each connecting external contact to memory cell array |
| 01/04/1994 | US5276895 Massively parallel array processing system |
| 01/04/1994 | US5276893 Semiconductor die structure |
| 01/04/1994 | US5276834 For a central processing unit |
| 01/04/1994 | US5276833 Data cache management system with test mode using index registers and CAS disable and posted write disable |
| 01/04/1994 | US5276823 Fault-tolerant computer system with redesignation of peripheral processor |
| 01/04/1994 | US5276648 Testing method for a semiconductor memory device |
| 01/04/1994 | US5276647 Static random access memory including stress test circuitry |
| 01/04/1994 | US5276360 Redundant control circuit incorporated in semiconductor integrated circuit device for producing control signal indicative of replacement with redundant unit |
| 12/28/1993 | US5274648 Memory card resident diagnostic testing |
| 12/28/1993 | US5274594 Static RAM |
| 12/28/1993 | US5274593 High speed redundant rows and columns for semiconductor memories |
| 12/22/1993 | EP0575067A2 Shared, distributed lock manager for loosely coupled processing systems |
| 12/22/1993 | EP0085386B1 Semiconductor device with spare memory cells |
| 12/22/1993 | CN1023266C Redundant means of semiconductor memory device and method thereof |
| 12/21/1993 | US5272673 Dynamic random access memory device with build-in test mode discriminator for interrupting electric power to row address decoder and driver for transfer gates |
| 12/21/1993 | US5272672 Semiconductor memory device having redundant circuit |
| 12/21/1993 | US5272671 Semiconductor memory device with redundancy structure and process of repairing same |
| 12/15/1993 | EP0574002A2 Semiconductor memory device with voltage stress test mode |
| 12/15/1993 | EP0573816A2 Data output impedance control |