| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 06/30/1993 | EP0548564A2 Storage device employing a flash memory |
| 06/30/1993 | EP0548153A1 Computer memory array control |
| 06/29/1993 | US5224107 Method in a parallel test apparatus for semiconductor memories |
| 06/29/1993 | US5224104 Real-time address switching circuit |
| 06/29/1993 | US5224103 Processing device and method of programming such a processing device |
| 06/29/1993 | US5224102 Design and test methodology for redundant shift registers |
| 06/29/1993 | US5224101 Micro-coded built-in self-test apparatus for a memory array |
| 06/29/1993 | US5224073 Redundant random access memory device equipped with encoder coupled between programming circuits and redundant word line driving circuits |
| 06/29/1993 | US5224070 Apparatus for determining the conditions of programming circuitry used with flash EEPROM memory |
| 06/24/1993 | WO1993012525A1 Flash memory improved in erasing characteristic, and circuit therefor |
| 06/24/1993 | DE4243611A1 Test mode circuit for data memory - has data entered and read out from data memory cells inverted during test mode to detect cross interference |
| 06/24/1993 | DE4232818A1 Redundant memory access circuit for dynamic random access memory - responds to defective main memory cell address to select redundant memory cell and isolate corresponding data bus |
| 06/23/1993 | EP0547919A2 A semiconductor memory with power-on reset control of disabled rows |
| 06/23/1993 | EP0547888A2 A read/write memory with improved test mode data compare |
| 06/23/1993 | EP0547844A2 Apparatus and method for controlling background processing in a disk array device |
| 06/23/1993 | EP0547682A2 Memory testing system with algorithmic test data generation |
| 06/23/1993 | EP0547640A2 Non-volatile semiconductor memory device and memory system using the same |
| 06/22/1993 | US5222217 System and method for implementing operating system message queues with recoverable shared virtual storage |
| 06/22/1993 | US5222109 Nonvolatile storage means |
| 06/22/1993 | US5222067 Detection of pattern-sensitive faults in RAM by use of M-sequencers |
| 06/22/1993 | US5222066 Modular self-test for embedded SRAMS |
| 06/17/1993 | DE4241327A1 Semiconductor SRAM with redundant memory block - records defective memory addresses and selects redundant memory when defective memory is tried to be accessed |
| 06/15/1993 | CA1319205C2 Modular integrated circuit device |
| 06/15/1993 | CA1319204C2 Universal integrated circuit module |
| 06/15/1993 | CA1319203C2 Method of building a variety of complex integrated circuits from standardizable components |
| 06/15/1993 | CA1319202C2 Method of testing integrated circuit device |
| 06/10/1993 | WO1993011503A1 Massively-parallel direct output processor array |
| 06/10/1993 | WO1993011491A1 Memory card device |
| 06/10/1993 | WO1993011488A1 A rom with ram cell and cyclic redundancy check circuit |
| 06/09/1993 | DE4226070A1 Semiconductor memory with redundancy circuit - has standby memory cell field whose cells can replace respective normal cells and has external signal indicating state of selection controller |
| 06/09/1993 | CN1021145C Address transmission method and apparatus |
| 06/08/1993 | US5218572 Semiconductor memory device |
| 06/08/1993 | US5217917 Semiconductor memory device with improved substrate arrangement to permit forming a plurality of different types of random access memory, and a testing method therefor |
| 06/03/1993 | DE4226710A1 Semiconductor memory with wordline control - generates wordline control signal for transfer to selected wordline and determines whether generated wordline signal should be boosted |
| 06/02/1993 | EP0544568A1 Reading circuit for redundancy fuse for integrated memory |
| 06/01/1993 | US5216678 Test method for a semiconductor memory device applied to a margin test |
| 06/01/1993 | US5216673 Semiconductor memory tester |
| 06/01/1993 | US5216672 Parallel diagnostic mode for testing computer memory |
| 05/27/1993 | WO1993010497A1 Integrated memory, management method therefor and data processing system resulting therefrom |
| 05/26/1993 | EP0543712A1 Integrated memory, method of control and resulting information system |
| 05/26/1993 | EP0543656A2 Flash-erasable semiconductor memory device having an improved reliability |
| 05/26/1993 | EP0543408A2 Semiconductor memory and screening test method thereof |
| 05/26/1993 | EP0542856A1 Integrated memory having improved testing means. |
| 05/25/1993 | US5214657 Method for fabricating wafer-scale integration wafers and method for utilizing defective wafer-scale integration wafers |
| 05/25/1993 | US5214654 Memory tester |
| 05/25/1993 | US5214611 Memory access device for accessing memory cell array diagonally |
| 05/25/1993 | US5214604 Electrically programmable read only memory device with dummy memory cells used in diagnostic operation on decoder units |
| 05/19/1993 | EP0542592A1 Integrated memory circuit comprising a redundancy system |
| 05/19/1993 | EP0541996A2 Checking for proper locations of storage devices in a storage device array |
| 05/19/1993 | EP0541992A2 Data reconstruction in a storage device array system |
| 05/19/1993 | EP0541991A2 Fault indication in a storage device array |
| 05/18/1993 | US5212784 Automated concurrent data backup system |
| 05/18/1993 | US5212442 Forced substrate test mode for packaged integrated circuits |
| 05/18/1993 | US5212413 Stable, programmable low-dissipation reference circuit |
| 05/12/1993 | EP0541288A2 Circuit module redundacy architecture |
| 05/12/1993 | EP0541240A1 High speed testing of field-effect transistors |
| 05/11/1993 | US5210863 Multi-processor system for detecting a malfunction of a dual port memory |
| 05/11/1993 | US5210758 Means and method for detecting and correcting microinstruction errors |
| 05/11/1993 | US5210717 Dynamic random access memory device with improved refreshing unit |
| 05/11/1993 | US5210716 Semiconductor nonvolatile memory |
| 05/05/1993 | EP0455653B1 Integrated semiconductor store |
| 05/04/1993 | US5208838 Clock signal multiplier |
| 05/04/1993 | US5208813 On-line reconstruction of a failed redundant array system |
| 05/04/1993 | US5208782 Semiconductor integrated circuit device having a plurality of memory blocks and a lead on chip (LOC) arrangement |
| 05/04/1993 | US5208780 Structure of electrically programmable read-only memory cells and redundancy signature therefor |
| 05/04/1993 | US5208778 Dynamic-type semiconductor memory device operable in test mode and method of testing functions thereof |
| 05/04/1993 | US5208777 Semiconductor memory device |
| 05/04/1993 | US5208776 Pulse generation circuit |
| 05/04/1993 | US5208775 Dual-port memory device |
| 05/04/1993 | US5208178 Testing macrocells before connecting wires |
| 04/29/1993 | DE4234157A1 Semiconductor memory with ECC - has signal detectors connected so that they receive externally buffered signal |
| 04/29/1993 | DE4135084A1 Memory circuit with feedback shift register and comparator - has defined addresses for test data supplied by built-in test circuit for functional check on memory |
| 04/29/1993 | DE4135000A1 Data back-up system for electronic computer networks - has server computer linked to workstations, two storage media accessible by server, and job controller to store back-up program |
| 04/27/1993 | US5206866 Bit error correcting circuit for a nonvolatile memory |
| 04/27/1993 | US5206831 Serial access semiconductor memory device having a redundancy system |
| 04/27/1993 | US5206583 Latch assisted fuse testing for customized integrated circuits |
| 04/21/1993 | EP0537973A2 Nand-cell type electrically erasable and programmable read- only memory with redundancy circuit |
| 04/20/1993 | US5204837 Semiconductor memory device having test mode |
| 04/20/1993 | US5204836 Method and apparatus for implementing redundancy in parallel memory structures |
| 04/13/1993 | US5203005 Cell structure for linear array wafer scale integration architecture with capability to open boundary i/o bus without neighbor acknowledgement |
| 04/13/1993 | US5202888 Semiconductor memory device having a multibit parallel test function and a method of testing the same |
| 04/13/1993 | US5202887 Access control method for shared duplex direct access storage device and computer system therefor |
| 04/13/1993 | US5202853 Circuit for performing a parallel write test of a wide multiple byte for use in a semiconductor memory device |
| 04/08/1993 | DE4132072A1 Pruefeinrichtung fuer integrierte schaltkreise Test equipment for integrated circuits |
| 04/07/1993 | EP0536026A1 Test method for multiport memory |
| 04/06/1993 | US5201041 Cache bypass apparatus |
| 04/06/1993 | US5200963 Self-checking on-line testable static ram |
| 04/06/1993 | US5200959 Device and method for defect handling in semi-conductor memory |
| 04/06/1993 | US5200923 Non-volatile memory device |
| 04/06/1993 | US5200922 Redundancy circuit for high speed EPROM and flash memory devices |
| 04/06/1993 | CA1315886C Memory testing system |
| 04/02/1993 | WO1993007565A1 Memory write protection method and apparatus |
| 04/02/1993 | CA2097308A1 Memory write protection method and apparatus |
| 03/31/1993 | EP0534187A2 Test device for integrated circuits |
| 03/31/1993 | EP0327861B1 Redundancy decoder for an integrated semiconductor memory |
| 03/30/1993 | US5199035 Logic circuit for reliability and yield enhancement |
| 03/30/1993 | US5199034 Apparatus and method for testing semiconductors for cell to bitline leakage |
| 03/30/1993 | US5199033 Solid state memory array using address block bit substitution to compensate for non-functional storage cells |
| 03/30/1993 | US5198380 Electrically (erasable and) programmable read only memories |
| 03/30/1993 | CA1315409C Memory diagnostic apparatus and method |