| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 06/07/1994 | US5319302 Semiconductor integrated circuit device having voltage regulating unit for variable internal power voltage level |
| 06/01/1994 | EP0599524A2 Self test mechanism for embedded memory arrays |
| 06/01/1994 | DE4213574C2 Halbleiterspeichereinrichtung und Betriebsverfahren dafür A semiconductor memory device and operating method therefor |
| 06/01/1994 | CN1024858C Memory modules for data and parity bit |
| 05/31/1994 | US5317726 Multiple-processor computer system with asynchronous execution of identical code streams |
| 05/31/1994 | US5317573 Apparatus and method for real time data error capture and compression redundancy analysis |
| 05/31/1994 | US5317532 Semiconductor memory device having voltage stress testing capability |
| 05/31/1994 | CA2026334C Technique for information protection on fault-tolerant redundant information storage devices |
| 05/31/1994 | CA2008902C Reconfigurable signal processor |
| 05/26/1994 | WO1994007211A3 Latent defect handling in eeprom devices |
| 05/25/1994 | EP0598654A1 Procedure and circuit for fuse blowing in an integrated circuit |
| 05/25/1994 | EP0548108B1 Circuit arrangement for testing a semiconductor store by means of parallel tests with different test bit patterns |
| 05/24/1994 | US5315598 Method to reduce burn-in time and inducing infant failure |
| 05/24/1994 | US5315554 Dynamic random access memory device with intermediate voltage generator interrupting power supply in test operation |
| 05/24/1994 | US5315553 Memory circuit test system using separate ROM having test values stored therein |
| 05/24/1994 | US5315552 Memory module, method for control thereof and method for setting fault bit table for use therewith |
| 05/24/1994 | US5315551 Semiconductor memory device with precharging voltage level unchanged by defective memory cell |
| 05/24/1994 | US5315130 Very high density wafer scale device architecture |
| 05/24/1994 | US5313999 Fabric light control window covering |
| 05/18/1994 | EP0597706A2 Solid state peripheral storage device |
| 05/18/1994 | EP0597598A2 Apparatus and method for steering spare bit in a multiple processor system |
| 05/17/1994 | US5313626 Disk drive array with efficient background rebuilding |
| 05/17/1994 | US5313585 Disk drive array with request fragmentation |
| 05/17/1994 | US5313430 Power down circuit for testing memory arrays |
| 05/17/1994 | US5313425 Semiconductor memory device having an improved error correction capability |
| 05/17/1994 | US5313424 Module level electronic redundancy |
| 05/17/1994 | US5313423 Semiconductor memory device |
| 05/14/1994 | CA2102659A1 Solid state peripheral storage device |
| 05/11/1994 | EP0596198A2 Flash eprom with erase verification and address scrambling architecture |
| 05/10/1994 | US5311520 Method and apparatus for programmable memory control with error regulation and test functions |
| 05/10/1994 | US5311476 Semiconductor memory, components and layout arrangements thereof, and method of testing the memory |
| 05/10/1994 | US5311473 Semiconductor memory with improved test mode |
| 05/10/1994 | US5311472 Redundant decoder circuit |
| 05/10/1994 | US5311470 Data latch circuit having non-volatile memory cell |
| 05/10/1994 | US5311462 Physical placement of content addressable memories |
| 05/05/1994 | DE4336884A1 Semiconductor device with predetermined test mode - applies potential at pre-specified internal node to external contact in test mode in response to control signals |
| 05/05/1994 | DE4336883A1 Integrated circuit output driver for suppressing noise generation, e.g. in DRAM - has current increase rate controller responding to voltage at predefined node in semiconductor substrate |
| 05/04/1994 | EP0595775A1 Method of evaluating the dielectric layer of nonvolatile EPROM, EEPROM and flash-EEPROM memories |
| 05/04/1994 | EP0595036A1 DMA controller with memory testing capability |
| 05/04/1994 | EP0594920A1 Method of evaluating the gate oxide of non-volatile EPROM, EEPROM and flash-EEPROM memories |
| 05/04/1994 | CN1086364A Duplicate control and processing unit for telecommunications equipment |
| 05/03/1994 | US5309446 Test validation method for a semiconductor memory device |
| 05/03/1994 | US5309444 Integrated circuit including a test cell for efficiently testing the accuracy of communication signals between a standard cell and an application cell |
| 05/03/1994 | US5309399 Semiconductor memory |
| 04/26/1994 | US5307356 Interlocked on-chip ECC system |
| 04/26/1994 | US5307316 Semiconductor memory unit having redundant structure |
| 04/26/1994 | US5307313 Flag circuit for memory |
| 04/21/1994 | DE4335061A1 Multiple memory with identical units on common system bus - contains bus address control circuits for switching between master and back=up units on deflection of fault in master unit |
| 04/21/1994 | DE4334946A1 Semiconductor memory with redundancy circuit occupying small area - ensures rapid substitution of good storage cells for address-registered defective cells of main memory |
| 04/19/1994 | US5305462 Mechanism for broadcasting data in a massively parallell array processing system |
| 04/19/1994 | US5305327 Testing random access memories |
| 04/19/1994 | US5305326 Method for handling data in a system |
| 04/19/1994 | US5305267 Semiconductor memory device adapted for preventing a test mode operation from undesirably occurring |
| 04/19/1994 | US5305266 High speed parallel test architecture |
| 04/19/1994 | US5305265 Semiconductor memory device having column selection circuit activated subsequently to sense amplifier after first or second period of time |
| 04/19/1994 | US5305261 Semiconductor memory device and method of testing the same |
| 04/19/1994 | US5305260 Electrically erasable and programmable read only memory device verifiable with standard external power voltage level |
| 04/14/1994 | WO1994008292A1 Duplicate control and processing unit for telecommunications equipment |
| 04/14/1994 | WO1994008289A1 Computer failure recovery and alert system |
| 04/14/1994 | DE4333765A1 Semiconductor memory, e.g. DRAM with time-controlled address transition detector - provides for delayed activation of detector after time defined by end-of-read=out signal in response to external control |
| 04/14/1994 | DE4201516C2 Schaltungsanordnung zum Bewirken eines Streßtests bei einer Halbleiterspeichervorrichtung A circuit arrangement for effecting a stress test in a semiconductor memory device |
| 04/14/1994 | DE4029247C2 Dual-Port-Speichereinrichtung Dual-port memory means |
| 04/13/1994 | EP0591870A2 Improved fuse-programmable control circuit |
| 04/13/1994 | EP0591811A2 Dynamic random access memory device having a parallel testing mode for producing arbitrary test pattern |
| 04/13/1994 | EP0591776A2 Semiconductor memory device having address transition detector quickly enabling redundancy decoder |
| 04/13/1994 | EP0591751A2 Semiconductor memory device |
| 04/13/1994 | EP0591562A1 Programm controlled optimization of a processor controlled circuit for producing an algorithmically generatable data output sequence |
| 04/13/1994 | EP0527866B1 Integrated semiconductor store with parallel test facility and redundancy process |
| 04/12/1994 | US5303193 Semiconductor device |
| 04/12/1994 | US5303192 Semiconductor memory device having information indicative of presence of defective memory cell |
| 04/12/1994 | US5303188 Semiconductor memory device regulable in access time after fabrication thereof |
| 04/06/1994 | EP0590982A2 Stress test for memory arrays in integrated circuits |
| 04/06/1994 | EP0590809A2 Nonvolatile semiconductor storage device |
| 04/06/1994 | EP0590651A2 Dynamic random access memory device having power supply system appropriately biasing switching transistors and storage capacitors in burn-in testing process |
| 04/06/1994 | EP0590608A2 Semiconductor memory device with redundancy |
| 04/05/1994 | US5301200 Electronic system for an indicator device having a matrix composed of bistable matrix points |
| 04/05/1994 | US5301156 Configurable self-test for embedded RAMs |
| 04/05/1994 | US5301155 Multiblock semiconduction storage device including simultaneous operation of a plurality of block defect determination circuits |
| 04/05/1994 | US5301153 Redundant element substitution apparatus |
| 04/05/1994 | US5301142 Semiconductor memory |
| 04/05/1994 | US5300840 Redundancy fuse reading circuit for integrated memory |
| 04/05/1994 | US5300824 Integrated circuit with improved on-chip power supply control |
| 03/31/1994 | WO1994007242A1 High speed redundant memory |
| 03/31/1994 | WO1994007211A2 Latent defect handling in eeprom devices |
| 03/31/1994 | DE4332618A1 Burn-in test circuit for semiconductor memory - has internal voltage generator switched to firing test mode by output signal of firing sensor |
| 03/29/1994 | US5299203 Semiconductor memory with a flag for indicating test mode |
| 03/29/1994 | US5299202 Method and apparatus for configuration and testing of large fault-tolerant memories |
| 03/29/1994 | US5299168 Circuit for detecting refresh address signals of a semiconductor memory device |
| 03/29/1994 | US5299164 Semiconductor memory device having redundant circuit |
| 03/29/1994 | US5299163 Semiconductor memory device with discriminator for diagnostic mode of operation |
| 03/29/1994 | US5299161 Method and device for improving performance of a parallel write test of a semiconductor memory device |
| 03/29/1994 | US5299160 Semiconductor memory device capable of repairing defective bits |
| 03/23/1994 | EP0588507A2 Method of testing interconnections between integrated circuits in a circuit |
| 03/23/1994 | EP0588425A2 Electronic drive circuits for active matrix devices, and a method of self-testing and programming such circuits |
| 03/22/1994 | US5297148 Memory card connectable to a computer system |
| 03/22/1994 | US5297103 Electrically erasable and programmable semiconductor memory device |
| 03/22/1994 | US5297101 PROM IC with a margin test function |
| 03/22/1994 | US5297095 Semiconductor non-volatile memory device improved in verifying operation for erased and write-in states |
| 03/22/1994 | US5297094 Integrated circuit memory device with redundant rows |
| 03/22/1994 | US5297088 Random access memory device with redundant row decoder for controlling a plurality of redundant word lines |