Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
12/1993
12/15/1993EP0573607A1 Redundant shift registers for scanning devices
12/15/1993EP0573550A1 Test process for redundant shift registers
12/14/1993US5271015 Self-diagnostic system for semiconductor memory
12/14/1993US5271012 Method and means for encoding and rebuilding data contents of up to two unavailable DASDs in an array of DASDs
12/14/1993US5270982 Dynamic random access memory device improved in testability without sacrifice of current consumption
12/14/1993US5270977 Dynamic random access memory device capable of performing test mode operation and method of operating such memory device
12/14/1993US5270976 Laser link decoder for DRAM redundancy scheme
12/14/1993US5270975 Memory device having a non-uniform redundancy decoder arrangement
12/14/1993US5270974 Monolithic fail bit memory
12/14/1993US5270590 Sense circuit for storage devices such a non-volatile memories, with enhanced sensing discrimination
12/09/1993WO1993024883A1 Improved solid state storage device
12/09/1993DE4317926A1 Dynamic random access memory with test function - reads out data from selected cells, performs logical operation processing to convert to lower number of data in test mode, and delays data output
12/09/1993DE4317887A1 DRAM with self-refresh function - has respective oscillator circuits for generating clock signal for defining refresh cycle in normal and test modes
12/09/1993DE4316283A1 Halbleiterspeichervorrichtung A semiconductor memory device
12/08/1993EP0573308A2 Posted write disk array system
12/08/1993EP0573307A2 Method and apparatus for maintaining and retrieving live data in a posted write cache in case of power failure
12/08/1993EP0573179A2 Non-fully-decoded test address generator
12/07/1993US5268870 Flash EEPROM system and intelligent programming and erasing methods therefor
12/07/1993US5268866 Memory with column redundancy and localized column redundancy control signals
12/07/1993US5268639 Testing timing parameters of high speed integrated circuit devices
12/07/1993US5268319 Controlled channel doping in electrically programmable read only memory cell
12/07/1993US5268318 Highly compact EPROM and flash EEPROM devices
12/06/1993CA2097783A1 Method and apparatus for maintaining and retrieving live data in a posted write cache in case of power failure
12/06/1993CA2097782A1 Posted write disk array system
12/06/1993CA2097762A1 Disk drive controller with a posted write cache memory
12/01/1993EP0572027A2 Semiconductor memory device
12/01/1993EP0350538B1 Memory device containing a static RAM memory that is adapted for executing a self-test, and integrated circuit containing such a device as an embedded static RAM memory
11/1993
11/30/1993US5267242 Method and apparatus for substituting spare memory chip for malfunctioning memory chip with scrubbing
11/30/1993US5267212 Random access memory with rapid test pattern writing
11/30/1993US5267206 Semiconductor integrated circuit with functional test mode to random access memory unit
11/30/1993US5267205 Semiconductor memory device
11/30/1993US5267204 Method and circuitry for masking data in a memory device
11/30/1993CA1324840C Reducing resources in a high reliability data storage subsystem
11/25/1993WO1993023808A1 Fault-monitoring method for transmitter
11/25/1993WO1993023806A1 Method and apparatus for reducing memory wearout in a computer system
11/25/1993WO1993023805A1 Fault tolerant power supply for an array of storage devices
11/25/1993WO1993023803A1 Disk array apparatus
11/24/1993EP0570597A1 Flash memory improved in erasing characteristic, and circuit therefor
11/24/1993EP0570516A1 Disk drive array memory system using nonuniform disk drives
11/24/1993EP0300516B1 Digital data processing system
11/24/1993CN1078820A Circuit for detecting refresh address signals of a semiconductor memory device
11/23/1993US5265104 Data storage system including redundant storage devices
11/23/1993US5265102 Test pattern generator
11/23/1993US5265100 Semiconductor memory with improved test mode
11/23/1993US5265099 Method for heating dynamic memory units whereby
11/23/1993US5265057 Semiconductor memory
11/23/1993US5265056 Signal margin testing system for dynamic RAM
11/23/1993US5265055 Semiconductor memory having redundancy circuit
11/23/1993US5265054 Semiconductor memory with precharged redundancy multiplexing
11/23/1993US5265051 Semiconductor memory device having an internal signal detector
11/23/1993US5264742 Security locks for integrated circuit
11/18/1993EP0570168A2 Adapter for connecting disk storage devices to a host computer
11/18/1993DE4244555A1 Integrated circuit with internal voltage reducer and ageing test mode - transfers voltage corresp. to change in external voltage, to internal supply line in response to ageing mode activation signal
11/16/1993USRE34445 Self-testing dynamic RAM
11/16/1993US5263031 Semiconductor integrated circuit having post-package testing function for error detection and correction circuit
11/16/1993US5263029 Memory efficient topological converter assembly
11/16/1993US5262994 Semiconductor memory with a multiplexer for selecting an output for a redundant memory access
11/16/1993US5262993 Semiconductor memory having redundancy circuit with means to switch power from a normal memory block to a spare memory block
11/11/1993DE4315061A1 Redundancy circuit for row-and-column memory check - includes activation circuit with fuse producing signal for control of operation of combinatorial circuits on decoded signals
11/11/1993DE4236099A1 Spaltenredundanter Schaltkreis für eine Halbleiter-Speichervorrichtung Spaltenredundanter circuit for a semiconductor memory device
11/10/1993EP0569313A2 Method and apparatus for operating an array of storage devices
11/10/1993EP0569040A2 Memory card device
11/10/1993EP0569014A2 Semiconductor memory device with a circuit
11/09/1993US5260952 Fault tolerant logic system
11/09/1993US5260946 Self-testing and self-configuration in an integrated circuit
11/09/1993US5260907 Repair circuit for integrated circuits
11/09/1993US5260906 Semiconductor memory having built-in test circuit
11/09/1993US5260902 Memory device
11/03/1993EP0568439A1 Process and circuit for detecting current leaks in a bit line
11/03/1993EP0568016A2 Semiconductor memory device having multiple selector unit simultaneously selecting memory cells from memory cell blocks in diagnostic mode of operation
11/03/1993EP0568015A2 Dynamic random access memory device with intermediate voltage generator interrupting power supply in test operation
11/03/1993EP0567707A1 Implementation of column redundancy in a cache memory architecture
11/02/1993US5258986 Tightly coupled, low overhead RAM built-in self-test logic with particular applications for embedded memories
11/02/1993US5258984 Method and means for distributed sparing in DASD arrays
11/02/1993US5258958 Semiconductor memory device
11/02/1993US5258954 Semiconductor memory including circuitry for driving plural word lines in a test mode
11/02/1993US5258953 Semiconductor memory device
10/1993
10/28/1993WO1993021748A1 Membrane dielectric isolation ic fabrication
10/28/1993WO1993021578A1 Integrated semiconductor memory with redundancy arrangement
10/28/1993DE4312238A1 Semiconductor memory with short-circuit testing function - has switches for alternately connecting cell select lines in column and=or row direction to current source line and ground, and has current meter for measuring leakage current.
10/28/1993DE4243592A1 Paralleltestschaltung für Halbleiter-Speichervorrichtung Parallel test circuitry for semiconductor memory device
10/27/1993EP0567104A2 Circuit for detecting refresh address signals of a semiconductor memory device
10/27/1993EP0566604A1 Process for testing a store arranged on a semiconductor component as a macrocell on the self-testing principle and circuit for implementing said process.
10/26/1993US5257231 Semicustom-made integrated circuit with built-in memory unit associated with internal timing generator for internal write enable signal
10/26/1993US5257230 Memory device including redundancy cells with programmable fuel elements and process of manufacturing the same
10/26/1993US5257229 Column redundancy architecture for a read/write memory
10/26/1993US5257228 Efficiency improved DRAM row redundancy circuit
10/26/1993US5256963 Digital testing for high-impedance states in digital electronic circuits
10/20/1993EP0566153A2 Semiconductor memory device having test mode
10/19/1993US5255271 Integrated circuit internal test mode indicator circuit
10/19/1993US5255270 Method of assuring data write integrity on a data storage device
10/19/1993US5255239 Bidirectional first-in-first-out memory device with transparent and user-testable capabilities
10/19/1993US5255234 Redundant means of a semiconductor memory device and method thereof
10/19/1993US5255230 Method and apparatus for testing the continuity of static random access memory cells
10/19/1993US5255229 Dynamic random access memory including stress test circuitry
10/19/1993US5255228 Semiconductor memory device with redundancy circuits
10/19/1993US5255227 Reconfiguring a memory array
10/19/1993US5255226 Semiconductor memory device with a redundancy circuit bypassing failed memory cells
10/19/1993US5255217 Integrated circuit memory device with a redundant memory block
10/13/1993EP0565079A1 Semiconductor device including voltage stress test shunting circuit
1 ... 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 ... 306