Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
09/1995
09/05/1995US5448719 Method and apparatus for maintaining and retrieving live data in a posted write cache in case of power failure
09/05/1995US5448578 Electrically erasable and programmable read only memory with an error check and correction circuit
09/05/1995US5448199 Internal supply voltage generation circuit
09/05/1995US5448187 Antifuse programming method and circuit which supplies a steady current after a programming voltage has dropped
08/1995
08/30/1995EP0669623A1 Test circuit of semiconductor memory device having data scramble function
08/30/1995EP0669622A1 Bias circuit for a transistor in a memory cell
08/30/1995EP0669576A1 Memory redundancy circuit
08/30/1995EP0428396B1 Bit error correcting circuit for a nonvolatile memory
08/29/1995US5446871 Method and arrangement for multi-system remote data duplexing and recovery
08/29/1995US5446741 Fast memory power-on diagnostics using DMA
08/29/1995US5446698 Block decoded redundant master wordline
08/29/1995US5446695 Memory device with programmable self-refreshing and testing methods therefore
08/29/1995US5446693 Semiconductor storage device
08/29/1995US5446692 Semiconductor memory device having redundancy memory cells shared among memory blocks
08/24/1995DE19504905A1 Plattensystem und Betriebsautomatisierungssteuerung und zugehöriges Betriebsverfahren Plate system and operating automation control and operating method thereof
08/23/1995EP0668563A1 Method for programming redundancy registers in a row redundancy integrated circuitry for a semiconductor memory device
08/23/1995EP0668562A1 Method for programming redundancy registers in a column redundancy integrated circuitry for a semiconductor memory device
08/23/1995EP0668561A2 A flexible ECC/parity bit architecture
08/22/1995US5444722 Memory module with address error detection
08/22/1995US5444666 Data output equipment for a semiconductor memory device
08/22/1995US5444661 Semiconductor memory device having test circuit
08/22/1995US5444659 Semiconductor memory device having means for monitoring bias voltage
08/17/1995DE19503390A1 Datenausgabepuffer-Steuerschaltung Data output buffer control circuit
08/16/1995EP0335149B1 Semiconductor memory redundancy scheme
08/15/1995US5442642 Test signal generator on substrate to test
08/15/1995US5442641 Fast data compression circuit for semiconductor memory chips including an array built-in self-test structure
08/15/1995US5442640 Test and diagnosis of associated output logic for products having embedded arrays
08/15/1995US5442614 Method of recording data and information regarding defects
08/15/1995US5442587 Semiconductor memory device
08/15/1995US5442282 Testing and exercising individual, unsingulated dies on a wafer
08/15/1995CA2021274C Non-volatile memory usage
08/10/1995DE4447150A1 Semiconductor memory redundance facilitating circuit for DRAM
08/09/1995EP0666573A1 Non volatile flip-flop, programmed via the source, especially for memory redundancy circuit
08/09/1995EP0666572A1 Non volatile programmable flip-flop with predefined initial state, especially for memory redundancy circuit
08/09/1995EP0666481A1 Analog voltage output circuit
08/09/1995CN1106560A Fault tolerant memory system
08/08/1995US5440518 Non-volatile memory circuits, architecture and methods
08/08/1995US5440516 Testing circuitry of internal peripheral blocks in a semiconductor memory device and method of testing the same
08/02/1995EP0665559A1 Non volatile programmable flip-flop, with reduction of parasitic effects in read mode, especially for memory redundancy circuit
08/02/1995EP0665558A1 Method for programming and testing a non-volatile memory
08/02/1995EP0665499A2 Hierarchic data storage system
08/02/1995EP0442651B1 Apparatus and method for background memory test during system start up
08/01/1995US5438573 Flash EEPROM array data and header file structure
08/01/1995US5438546 Programmable redundancy scheme suitable for single-bit state and multibit state nonvolatile memories
08/01/1995US5438519 Electronic postage meter having memory write access second chance hard timer means
07/1995
07/27/1995WO1995020226A1 Process for testing digital storage devices
07/27/1995WO1995014970A3 A fault tolerant queue system
07/27/1995DE4402122A1 Verfahren zum Test von digitalen Speichereinrichtungen A method for testing of digital storage devices
07/26/1995EP0664029A1 Computer failure recovery and alert system
07/25/1995US5437026 Removing uncommitted changes made to stored data by a database management system
07/25/1995US5437020 Method and circuitry for detecting lost sectors of data in a solid state memory disk
07/25/1995US5436912 Circuit arrangement for testing a semiconductor memory by means of parallel tests using various test bit patterns
07/25/1995US5436911 Semiconductor memory device comprising a test circuit and a method of operation thereof
07/25/1995US5436910 Dynamic random access memory device having a parallel testing mode for producing arbitrary test pattern
07/25/1995US5436870 Semiconductor memory device
07/20/1995DE4445431A1 Active matrix video display with multiple drive lines
07/19/1995EP0663084A1 Fault tolerant memory system
07/19/1995EP0366757B1 Memory selftest method and apparatus
07/18/1995US5434868 Fault tolerant memory
07/18/1995US5434825 Flash EEPROM system cell array with more than two storage states per memory cell
07/18/1995US5434819 Semiconductor memory device having an automatically activated verify function capability
07/18/1995US5434814 Circuit for repairing defective read only memories with redundant NAND string
07/18/1995US5434805 Test timing program automatic generator
07/18/1995CA2034904C High speed, small diameter disk storage system
07/12/1995EP0662692A1 Non-volatile semiconductor memory device
07/12/1995EP0662659A1 Method for minimizing the effect of memory errors within a digital information storage system
07/11/1995US5432927 Device for reprogramming computer software instructions
07/11/1995US5432922 Digital storage system and method having alternating deferred updating of mirrored storage disks
07/11/1995US5432802 Information processing device having electrically erasable programmable read only memory with error check and correction circuit
07/11/1995US5432797 IC tester having a pattern selector capable of selecting pins of a device under test
07/11/1995US5432748 Solid state peripheral storage device
07/11/1995US5432747 Self-timing clock generator for precharged synchronous SRAM
07/11/1995US5432745 Method for testing a memory device
07/11/1995US5432744 Dynamic semiconductor memory circuit
07/11/1995CA2118543A1 Method for minimizing the effect of memory errors within a digital information storage system
07/05/1995EP0661750A1 Semiconductor device capable of assembling adjacent sub chips into one chip
07/05/1995EP0661636A1 Integrated programming circuitry for an electrically programmable semiconductor memory device with redundancy
07/04/1995US5430868 Shared memory with benign failure modes
07/04/1995US5430866 Method and apparatus for deriving mirrored unit state when re-initializing a system
07/04/1995US5430855 Disk drive array memory system using nonuniform disk drives
07/04/1995US5430734 Fault-tolerant waferscale integrated circuit device and method
07/04/1995US5430679 Flexible redundancy architecture and fuse download scheme
07/04/1995US5430678 Semiconductor memory having redundant cells
07/04/1995US5430677 Architecture for reading information from a memory array
06/1995
06/29/1995DE4446998A1 Semiconductor memory appts. using NAND, AND, dual-input NOR cells
06/28/1995EP0660237A2 Semiconductor memory apparatus with a spare memory cell array
06/28/1995EP0659291A1 Memory circuit with redundancy architecture
06/28/1995EP0417484B1 Semiconductor memory device and process for making the same
06/27/1995US5428802 For use in a disk data storage and retrieval system
06/27/1995US5428621 Latent defect handling in EEPROM devices
06/27/1995US5428620 Data writing/reading device of camera
06/27/1995US5428576 Semiconductor device and method of screening the same
06/27/1995US5428575 Semiconductor memory device with comparing circuit for facilitating test mode
06/27/1995US5428574 Integrated circuit microcomputer
06/27/1995US5428573 Integrated circuit device
06/27/1995US5428572 Program element for use in redundancy technique for semiconductor memory device
06/27/1995US5428571 Data latch circuit having non-volatile memory cell equipped with common floating gate and stress relaxing transistor
06/27/1995US5428569 Non-volatile semiconductor memory device
06/27/1995US5428299 Semiconductor integrated circuit device having low power consumption voltage monitoring circuit for built-in step-down voltage generator
06/22/1995WO1995016923A1 Separate iddq-testing of signal path and bias path in an ic
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