Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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01/16/1996 | US5485425 Semiconductor memory device having redundant column and operation method thereof |
01/16/1996 | US5485424 Semiconductor memory and redundant-address writing method |
01/16/1996 | US5485105 Apparatus and method for programming field programmable arrays |
01/16/1996 | CA2047911C Circuit arrangement for an indicator device having a matrix composed of bistable matrix points |
01/11/1996 | DE4322994C2 Halbleiterspeichervorrichtung und Verfahren zum Setzen des Test-Modus einer Halbleiterspeichervorrichtung A semiconductor memory device and method of setting the test mode of a semiconductor memory device |
01/10/1996 | EP0691617A2 Directional asymmetric signal swing bus system for circuit module architecture |
01/10/1996 | EP0691612A1 A test circuit of embedded arrays in mixed logic and memory chips |
01/10/1996 | EP0419863B1 Multiple I/O select memory |
01/09/1996 | US5483544 Vector-specific testability circuitry |
01/09/1996 | US5483493 Multi-bit test circuit of semiconductor memory device |
01/09/1996 | US5483491 Memory card device |
01/09/1996 | US5483490 Semiconductor integrated device and wiring correction arrangement therefor |
01/09/1996 | US5483488 Semiconductor static random access memory device capable of simultaneously carrying disturb test in a plurality of memory cell blocks |
01/09/1996 | US5483471 Microcomputer |
01/09/1996 | US5483155 Test system and method for dynamic testing of a plurality of packaged same-type charge coupled device image sensors |
01/03/1996 | EP0690381A1 Redundancy scheme for memory circuits |
01/03/1996 | EP0689695A1 Fault tolerant memory system |
01/03/1996 | CN1114456A Semiconductor dovice and unit for driving same |
01/02/1996 | US5481749 Shift register divided into a number of cells and a number of stages within each cell to permit bit and multiple bit shifting |
01/02/1996 | US5481671 Memory testing device for multiported DRAMs |
01/02/1996 | US5481670 Method and apparatus for backup in a multi-memory device |
01/02/1996 | US5481551 IC element testing device |
01/02/1996 | US5481499 Integrated matrix memory, comprising a circuit arrangement for testing the addressing |
01/02/1996 | US5481498 Redundancy circuit for semiconductor memory device |
01/02/1996 | CA2044441C Semiconductor storage system |
12/28/1995 | WO1995035573A1 Process for matching partial memory devices |
12/27/1995 | EP0689143A1 Data storage subsystem |
12/27/1995 | EP0689125A2 Method of utilizing storage disks of differing capacity in a single storage volume in a hierarchic disk array |
12/27/1995 | EP0451595B1 Short circuit detector circuit for memory array |
12/26/1995 | US5479653 Disk array apparatus and method which supports compound raid configurations and spareless hot sparing |
12/26/1995 | US5479611 Disk array apparatus |
12/26/1995 | US5479609 Solid state peripheral storage device having redundent mapping memory algorithm |
12/26/1995 | US5479415 Method and apparatus for generating test pulses |
12/26/1995 | US5479413 Method for testing large memory arrays during system initialization |
12/26/1995 | US5479371 Semiconductor memory device |
12/26/1995 | US5479370 Semiconductor memory with bypass circuit |
12/26/1995 | US5479093 Internal voltage generating circuit of a semiconductor device |
12/21/1995 | WO1995034897A1 Memory test system |
12/21/1995 | WO1995034858A1 Memory error correction |
12/19/1995 | US5477494 Apparatus for generating address bit patterns for testing semiconductor memory devices |
12/19/1995 | US5477492 Memory device to detect and compensate for defective memory cells |
12/19/1995 | US5477151 Capacitor and diode circuitry for on chip power spike detection |
12/19/1995 | CA2034027C Dynamic ram with on-chip ecc and optimized bit and word redundancy |
12/14/1995 | DE19520979A1 Semiconductor memory with column redundancy device for esp. DRAM |
12/13/1995 | EP0686981A2 Method for testing large memory arrays during system initialization |
12/13/1995 | EP0686980A1 Semiconductor memory device having means for replacing defective memory cells |
12/13/1995 | EP0686979A1 Failure tolerant memory device, in particular of the flash EEPROM type |
12/13/1995 | EP0686978A1 A method for in-factory testing of flash EEPROM devices |
12/13/1995 | EP0686907A2 Memory system with hierarchic disk array and memory map store for persistent storage of virtual mapping information |
12/13/1995 | EP0392895B1 Flash EEprom system |
12/13/1995 | EP0361404B1 Memory circuit provided with improved redundant structure |
12/13/1995 | CN1113348A Semiconductor integrated circuit with a stress circuit and method for suppluing a stress voltage thereof |
12/12/1995 | US5475815 Built-in-self-test scheme for testing multiple memory elements |
12/12/1995 | US5475693 Error management processes for flash EEPROM memory arrays |
12/12/1995 | US5475692 Semiconductor memory device |
12/12/1995 | US5475648 Redundancy semiconductor memory device which utilizes spare memory cells from a plurality of different memory blocks, and utilizes the same decode lines for both the primary and spare memory cells |
12/12/1995 | US5475646 Screening circuitry for a dynamic random access memory |
12/12/1995 | US5475640 Method and apparatus for inhibiting a predecoder when selecting a redundant row line |
12/06/1995 | EP0685852A2 Memory system and method of using same |
12/06/1995 | EP0685073A1 Separate i ddq-testing of signal path and bias path in an ic |
12/05/1995 | US5473753 Method of managing defects in flash disk memories |
12/05/1995 | US5473616 Address pattern generator |
12/05/1995 | US5473575 Integrated circuit I/O using a high performance bus interface |
12/05/1995 | US5473573 Single chip controller-memory device and a memory architecture and methods suitable for implementing the same |
11/30/1995 | WO1995032507A1 Programmable logic device with verify circuitry for classifying fuse link states as validly closed, validly open or invalid |
11/30/1995 | WO1995032433A1 Method for programming antifuses for reliable programmed links |
11/30/1995 | DE19519453A1 Semiconductor memory test appts. for integrated logic circuit with multiple RAM, ROM |
11/30/1995 | DE19517555A1 Semiconductor memory matrix appts. with redundant memory cells for e.g. SRAM |
11/30/1995 | DE19515661A1 DASD semiconductor memory |
11/28/1995 | US5471640 Programmable disk array controller having n counters for n disk drives for stripping data where each counter addresses specific memory location by a count n |
11/28/1995 | US5471482 VLSI embedded RAM test |
11/28/1995 | US5471480 Parallel test circuit for use in a semiconductor memory device |
11/28/1995 | US5471479 Arrangement for column sparing of memory |
11/28/1995 | US5471478 Flash EEPROM array data and header file structure |
11/28/1995 | US5471431 Structure to recover a portion of a partially functional embedded memory |
11/28/1995 | US5471430 Test circuit for refresh counter of clock synchronous type semiconductor memory device |
11/28/1995 | US5471429 Burn-in circuit and method therefor of semiconductor memory device |
11/28/1995 | US5471427 Circuit for repairing defective bit in semiconductor memory device and repairing method |
11/28/1995 | US5471426 Redundancy decoder |
11/22/1995 | EP0480915B1 Defective element disabling circuit having a laser-blown fuse |
11/22/1995 | CN1112276A Semiconductor memory apparatus |
11/21/1995 | US5469453 Data corrections applicable to redundant arrays of independent disks |
11/21/1995 | US5469451 Error detection and correction of a semiconductor memory device |
11/21/1995 | US5469450 Nonvolatile memory device including multi-ECC circuit |
11/21/1995 | US5469445 Transparent testing of integrated circuits |
11/21/1995 | US5469444 Semiconductor memory system |
11/21/1995 | US5469443 Method and apparatus for testing random access memory |
11/21/1995 | US5469401 Column redundancy scheme for DRAM using normal and redundant column decoders programmed with defective array address and defective column address |
11/21/1995 | US5469396 Apparatus and method determining the resistance of antifuses in an array |
11/21/1995 | US5469394 Nonvolatile semiconductor memory device having a status register and test method for the same |
11/21/1995 | US5469393 Monolithic memory device |
11/21/1995 | US5469391 Semiconductor memory device including redundancy circuit for remedying defect in memory portion |
11/21/1995 | US5469390 Semiconductor memory system with the function of the replacement to the other chips |
11/21/1995 | US5469389 Semiconductor memory with memory matrix comprising redundancy cell columns associated with single matrix sectors |
11/21/1995 | US5469388 Row redundancy circuit suitable for high density semiconductor memory devices |
11/21/1995 | US5469384 Decoding scheme for reliable multi bit hot electron programming |
11/21/1995 | US5469381 Semiconductor memory having non-volatile semiconductor memory cell |
11/21/1995 | US5469379 Multi-level vROM programming method and circuit |
11/21/1995 | US5469065 On chip capacitor based power spike detection |
11/21/1995 | CA2030940C Computer controlled optimized pairing of disk units |