Patents
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
07/1996
07/23/1996US5539692 Semiconductor memory and method of setting type
07/23/1996US5539689 Nonvolatile semiconductor storage device and semiconductor device
07/23/1996US5539683 Method and device for processing, and detecting a state of, binary data
07/23/1996US5539325 Testing and exercising individual, unsingulated dies on a wafer
07/18/1996DE19547294A1 Semiconductor memory device with data rewrite facility for DRAM
07/18/1996DE19531683A1 Flash memory with data refreshing function
07/17/1996EP0721645A1 Automatic test circuitry with non-volatile status write
07/17/1996EP0493013B1 Semiconductor integrated circuit having test circuit
07/17/1996CN1032337C Circuit for detecting refresh address signals of semiconductor memory device
07/16/1996US5537665 Multiple bank column redundancy intialization controller for cache RAM
07/16/1996US5537652 Data file directory system and method for writing data file directory information
07/16/1996US5537632 Method and system for fault coverage testing memory
07/16/1996US5537631 Memory management technique for defective memory
07/16/1996US5537621 Integrated memory, method for managing it, and resultant information processing system
07/16/1996US5537570 Cache with a tag duplicate fault avoidance system and method
07/16/1996US5537566 Apparatus and method for controlling background processing in disk array device
07/16/1996US5537533 System and method for remote mirroring of digital data from a primary network server to a remote network server
07/16/1996US5537356 Nonvolatile semiconductor memory
07/16/1996US5537355 Integrated circuit random access memory
07/16/1996US5537351 Semiconductor memory device carrying out input and output of data in a predetermined bit organization
07/16/1996US5537053 Integrated circuit
07/11/1996WO1996021229A1 Non-volatile memory device for fault tolerant data
07/11/1996DE19543834A1 Defektzellen-Reparaturschaltkreis und Verfahren für eine Halbleiterspeichervorrichtung Defective cell repair circuit and method for a semiconductor memory device
07/10/1996EP0721162A2 Mirrored memory dual controller disk storage system
07/10/1996CN1032282C Row redundancy circuit for a semiconductor memory device
07/09/1996US5535367 Demultiplexing initialization data to be transferred to memory through a plurality of registers with error detection data
07/09/1996US5535354 Method for addressing a block addressable memory using a gray code
07/09/1996US5535353 Address generating circuit for data compression
07/09/1996US5535328 Method of operating a computer system
07/09/1996US5535173 Data-storage device
07/09/1996US5535167 Non-volatile memory circuits, architecture
07/09/1996US5535165 Circuits, systems and methods for testing integrated circuit devices including logic and memory circuitry
07/09/1996US5535164 BIST tester for multiple memories
07/09/1996US5535163 Semiconductor memory device for inputting and outputting data in a unit of bits
07/09/1996US5535161 Semiconductor memory device with built-in accessing system for redundant information less affecting data access speed in standard mode
07/04/1996WO1996020443A1 Error management processes for flash eeprom memory arrays
07/03/1996EP0720097A2 Method for identifying untestable & redundant faults in sequential logic circuits
07/02/1996US5533196 Method and apparatus for testing for a sufficient write voltage level during power up of a SRAM array
07/02/1996US5533194 Hardware-assisted high speed memory test apparatus and method
07/02/1996US5532966 Random access memory redundancy circuit employing fusible links
07/02/1996US5532963 Semiconductor memory and screening test method thereof
07/02/1996US5532962 Solid-state memory system
07/02/1996US5532959 Electrically erasable and programmable read only memory device equipped with inspection circuit for threshold levels of memory cells
07/02/1996US5532840 Facsimile machine
07/02/1996US5532623 For reading a state of a memory
07/02/1996US5532618 Stress mode circuit for an integrated circuit with on-chip voltage down converter
06/1996
06/26/1996EP0718850A1 Integrated circuit memory test method and circuit
06/26/1996EP0718767A1 Semiconductor memory device incorporating redundancy memory cells
06/26/1996EP0666573B1 Non volatile flip-flop, programmed via the source, especially for memory redundancy circuit
06/26/1996EP0665559B1 Non volatile programmable flip-flop, with reduction of parasitic effects in read mode, especially for memory redundancy circuit
06/25/1996US5530960 Disk drive controller accepting first commands for accessing composite drives and second commands for individual diagnostic drive control wherein commands are transparent to each other
06/25/1996US5530805 Failure analysis device for memory devices
06/25/1996US5530677 Semiconductor memory system having a write control circuit responsive to a system clock and/or a test clock for enabling and disabling a read/write latch
06/25/1996US5530674 Structure capable of simultaneously testing redundant and non-redundant memory elements during stress testing of an integrated circuit memory device
06/25/1996US5530673 Flash memory control method and information processing system therewith
06/20/1996WO1994028549A3 Erase and program verification circuit for non-volatile memory
06/19/1996EP0717358A1 Failure detection system for a mirrored memory dual controller disk storage system
06/19/1996EP0669576B1 Memory redundancy circuit
06/19/1996CN1124876A A semiconductor memory system
06/18/1996US5528755 In a data processing system
06/18/1996US5528602 Method for determining computer subsystem property
06/18/1996US5528553 Method and apparatus for testing random access memory
06/18/1996US5528546 Erase and program verification circuit for non-volatile memory
06/18/1996US5528540 Redundant address decoder
06/18/1996US5528539 High speed global row redundancy system
06/13/1996DE19545743A1 Semiconductor memory error-bit safeguard device for dynamic random access memory
06/12/1996EP0716421A2 A method for testing an array of Random Access Memories (RAMs)
06/12/1996EP0315157B1 Semiconductor memory system
06/11/1996US5526364 Apparatus for entering and executing test mode operations for memory
06/11/1996US5526335 Information reproducing method comprising the step of preparing a defect bit map and a defect index table
06/11/1996US5526317 Structure for using a portion of an integrated circuit die
06/11/1996US5526312 In an integrated circuit
06/11/1996US5526311 Method and circuitry for enabling and permanently disabling test mode access in a flash memory device
06/11/1996US5525909 Apparatus and method for measuring programmed antifuse resistance
06/05/1996EP0715249A2 Methods of and system for reserving storage space for data migration in a redundant hierarchic data storage system by dynamically computing maximum storage space for mirror redundancy
06/05/1996EP0714546A1 Erase and program verification circuit for non-volatile memory
06/05/1996EP0472209B1 Semiconductor memory device having redundant circuit
06/04/1996US5524231 Nonvolatile memory card with an address table and an address translation logic for mapping out defective blocks within the memory card
06/04/1996US5524208 Method and apparatus for performing cache snoop testing using DMA cycles in a computer system
06/04/1996US5524207 Data processing device comprising a multiport RAM as a sequential circuit
06/04/1996US5524115 Input/output selection circuit of column repair
06/04/1996US5523980 Semiconductor memory device
06/04/1996US5523977 Testing semiconductor memory device having test circuit
06/04/1996US5523976 Non-volatile semiconductor memory device having a memory cell group operative as a redundant memory cell group for replacement of another group
06/04/1996US5523975 Redundancy scheme for monolithic memories
06/04/1996US5523974 Semiconductor memory device with redundant memory cell backup
06/04/1996US5523972 Method and apparatus for verifying the programming of multi-level flash EEPROM memory
06/04/1996US5523915 Data storage system
05/1996
05/30/1996DE4442309A1 Data processing equipment for redundant storage of data
05/29/1996EP0714059A2 Method and apparatus for controlling memory operationsM
05/28/1996US5522038 Testing mapped signal sources
05/28/1996US5522035 Buffer memory self-diagnosis method for information signal processing apparatus
05/28/1996US5522031 Method and apparatus for the on-line restoration of a disk in a RAID-4 or RAID-5 array with concurrent access by applications
05/28/1996US5521873 Semiconductor dynamic random access memory
05/28/1996US5521870 Semiconductor memory device having a coincidence detection circuit and its test method
05/28/1996US5521864 Non-volatile semiconductor memory device allowing fast verifying operation
05/28/1996US5520858 Liquid vaporizing apparatus
05/23/1996WO1996015538A1 Circuits, systems, and methods for accounting for defective cells in a memory device
05/23/1996WO1996015536A1 A method of testing a memory address decoder and a fault-tolerant memory address decoder
05/23/1996DE4316283C2 Halbleiterspeichervorrichtung A semiconductor memory device