Patents
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
12/1996
12/19/1996WO1996041264A1 Static wordline redundancy memory device
12/19/1996WO1996041261A1 Method and system for using mirrored data to detect corrupt data
12/19/1996WO1996041249A2 Intelligent disk-cache memory
12/19/1996WO1996041204A1 Method and apparatus for probing, testing, burn-in, repairing and programming of integrated circuits in a closed environment using a single apparatus
12/19/1996CA2216636A1 Method and system for using mirrored data to detect corrupt data
12/18/1996EP0696031B1 Programmable integrated memory with emulation means
12/18/1996CN1033607C Semiconductor memory device including multi-ecc circuit
12/17/1996US5586300 Flexible addressing memory controller wherein multiple memory modules may be accessed according to comparison of configuration addresses
12/17/1996US5586248 Disk drive controller with a posted write cache memory
12/17/1996US5586075 Electrically erasable and programmable read-only memory having redundant memory cell row
12/17/1996US5586074 Semiconductor memory device with function of preventing loss of information due to leak of charges or disturbing
12/12/1996WO1996039795A1 Multiple probing of an auxiliary test pad which allows for reliable bonding to a primary bonding pad
12/12/1996WO1996039662A1 Memory system
12/12/1996DE19601547A1 Storage circuit and data control circuit with address assignment/allocation circuit
12/11/1996EP0747906A2 A method of testing a random access memory
12/11/1996EP0747905A1 Memory testing apparatus for microelectronic integrated circuit
12/11/1996EP0747824A1 Circuit and method for biasing bit lines
12/11/1996EP0747823A2 Digital audio data storage device
12/11/1996CN1137677A Memory circuit, data control circuit of memory circuit and address assigning circuit of memory circuit
12/10/1996US5584002 Cache remapping using synonym classes
12/10/1996US5583822 Single chip controller-memory device and a memory architecture and methods suitable for implementing the same
12/10/1996US5583817 Semiconductor integrated circuit device
12/10/1996US5583816 Structure to perform long write testing of a static memory device
12/10/1996US5583812 Flash EEPROM system cell array with more than two storage states per memory cell
12/10/1996US5583463 For detecting a nominally blown or unblown state of a fuse
12/05/1996WO1996038845A1 Technique for reconfiguring a high density memory
12/04/1996EP0745998A1 Circuit and method for accessing memory cells of a memory device
12/04/1996EP0745859A2 Configurable probe pads to facilitate parallel testing of integrated circuit devices
12/04/1996EP0666481B1 Analog voltage output circuit
12/04/1996EP0442301B1 Dynamic RAM with on-chip ECC and optimized bit and word redundancy
12/03/1996US5581740 System for reading CD ROM data from hard disks
12/03/1996US5581567 Dual level error detection and correction employing data subsets from previously corrected data
12/03/1996US5581510 Method of testing flash memory
12/03/1996US5581509 Double-row address decoding and selection circuitry for an electrically erasable and programmable non-volatile memory device with redundancy, particularly for flash EEPROM devices
12/03/1996US5581508 Semiconductor memory having sub-word line replacement
12/03/1996US5581205 Semiconductor device capable of assembling adjacent sub chips into one chip
12/03/1996US5580687 Contact stepper printed lithography method
11/1996
11/27/1996EP0744755A1 Test method and device for embedded memories on semiconductor substrates
11/27/1996CN1136696A Lengthy disc storaging system
11/27/1996CN1136682A Computer system and repeater
11/26/1996US5579502 Memory card apparatus using EEPROMS for storing data and an interface buffer for buffering data transfer between the EEPROMS and an external device
11/26/1996US5579477 Test circuitry for printer memory
11/26/1996US5579475 Method and means for encoding and rebuilding the data contents of up to two unavailable DASDS in a DASD array using simple non-recursive diagonal and row parity
11/26/1996US5579474 Disk array system and its control method
11/26/1996US5579326 Method and apparatus for programming signal timing
11/26/1996US5579322 Dual port memory having testing circuit
11/26/1996US5579272 Semiconductor memory device with data compression test function and its testing method
11/26/1996US5579271 Automatic test circuit for a semiconductor memory device capable of generating internal ras and cas signals, and row and column address signals
11/26/1996US5579270 Flash EEPROM with auto-function for automatically writing or erasing data
11/26/1996US5579269 Semiconductor memory device having redundancy serial access memory portion
11/26/1996US5579268 Semiconductor memory device capable of driving word lines at high speed
11/26/1996US5579266 Semiconductor memory device
11/26/1996US5579265 Memory redundancy circuit
11/26/1996US5579262 Program verify and erase verify control circuit for EPROM/flash
11/26/1996US5578942 Super VCC detection circuit
11/20/1996CN1136354A A fault tolerant queue system
11/19/1996US5577194 Method of managing defects in flash disk memories
11/19/1996US5577051 Static memory long write test
11/19/1996US5577050 Method and apparatus for configurable build-in self-repairing of ASIC memories design
11/19/1996US5576999 Redundancy circuit of a semiconductor memory device
11/19/1996US5576996 Semiconductor memory device having a variably write pulse width capability
11/19/1996US5576994 Non-volatile semiconductor memory device
11/19/1996US5576637 Exclusive or circuit
11/19/1996US5576633 Block specific spare circuit
11/19/1996US5576554 Wafer-scale integrated circuit interconnect structure architecture
11/14/1996DE19615660A1 Load voltage applying circuit for non-volatile semiconductor memory
11/14/1996DE19612407A1 Semiconductor memory device with redundancy row and column
11/14/1996DE19534783A1 Micro-controller self-testing method
11/13/1996EP0429673B1 Test pattern generator
11/13/1996CN1135644A Semiconductor storage device having function of inhibiting leakage electric-current redundancy of fault storage unit
11/12/1996US5574950 Remote data shadowing using a multimode interface to dynamically reconfigure control link-level and communication link-level
11/12/1996US5574863 System for using mirrored memory as a robust communication path between dual disk storage controllers
11/12/1996US5574857 Error detection circuit for power up initialization of a memory array
11/12/1996US5574856 Fault indication in a storage device array
11/12/1996US5574850 Circuitry and method for reconfiguring a flash memory
11/12/1996US5574734 Test generation of sequential circuits using software transformations
11/12/1996US5574729 Redundancy circuit for repairing defective bits in semiconductor memory device
11/12/1996US5574692 Memory testing apparatus for microelectronic integrated circuit
11/12/1996US5574691 Semiconductor memory device having circuit for activating predetermined rows of memory cells upon detection of disturb refresh test
11/12/1996US5574690 Self-test device for memories, decoders, etc.
11/12/1996US5574689 Address comparing for non-precharged redundancy address matching
11/12/1996US5574688 Apparatus and method for mapping a redundant memory column to a defective memory column
11/12/1996US5574684 Flash memory having data refresh function and data refresh method of flash memory
11/12/1996US5574499 For processing video signals by one horizontal scanning period
11/06/1996EP0741392A1 Using one memory to supply addresses to an associated memory during testing
11/06/1996EP0740838A1 Process for testing digital storage devices
11/06/1996CN1135081A Semiconductor memory device and data writing method thereof
11/05/1996US5572707 Nonvolatile memory with a programmable configuration cell and a configuration logic for temporarily reconfiguring the memory without altering the programmed state of the configuration cell
11/05/1996US5572661 Methods and system for detecting data loss in a hierarchic data storage system
11/05/1996US5572659 Adapter for constructing a redundant disk storage system
11/05/1996US5572476 Apparatus and method for determining the resistance of antifuses in an array
11/05/1996US5572472 Integrated zener-zap nonvolatile memory cell with programming and pretest capability
11/05/1996US5572471 Redundancy scheme for memory circuits
11/05/1996US5572470 Apparatus and method for mapping a redundant memory column to a defective memory column
11/05/1996US5572463 Nonvolatile semiconductor memory with pre-read means
11/05/1996US5572458 Multi-level vROM programming method and circuit
11/05/1996US5571741 Membrane dielectric isolation IC fabrication
10/1996
10/31/1996WO1996034408A1 Improved test and assembly apparatus
10/31/1996WO1996034395A1 Manufacture and testing of semiconductor devices
10/31/1996WO1996034391A1 Nonvolatile memory blocking architecture and redundancy