| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 06/24/1997 | US5642312 Flash EEPROM system cell array with more than two storage states per memory cell |
| 06/24/1997 | US5642309 Auto-program circuit in a nonvolatile semiconductor memory device |
| 06/18/1997 | EP0441090B1 Computer controlled optimized pairing of disk units |
| 06/17/1997 | US5640530 Data processing system |
| 06/17/1997 | US5640509 Programmable built-in self-test function for an integrated circuit |
| 06/17/1997 | US5640365 Semiconductor memory device with a decoding peripheral circuit for improving the operation frequency |
| 06/17/1997 | US5640354 Dynamic random access memory having self-test function |
| 06/17/1997 | US5640353 External compensation apparatus and method for fail bit dynamic random access memory |
| 06/17/1997 | US5640340 Adjustable cell plate generator |
| 06/17/1997 | US5640123 Substrate voltage control circuit for a flash memory |
| 06/17/1997 | CA2074750C Method and apparatus for programmable memory control with error regulation and test functions |
| 06/11/1997 | EP0778585A1 Method and circuit for characterising an integrated memory device |
| 06/11/1997 | EP0778584A1 Semiconductor integrated circuit device with large-scale memory and controller embedded on one semiconductor chip, and method of testing the device |
| 06/11/1997 | EP0778528A2 Semiconductor memory having redundancy memory cells |
| 06/11/1997 | EP0496391B1 Semiconductor memory device |
| 06/10/1997 | US5638506 Method for logically isolating a cache memory bank from a memory bank group |
| 06/10/1997 | US5638385 Fast check bit write for a semiconductor memory |
| 06/10/1997 | US5638334 Integrated circuit I/O using a high performance bus interface |
| 06/10/1997 | US5638331 Burn-in test circuit and method in semiconductor memory device |
| 06/10/1997 | US5638317 Hierarchical DRAM array with grouped I/O lines and high speed sensing circuit |
| 06/10/1997 | US5637907 Three dimensional semiconductor circuit structure with optical interconnection |
| 06/05/1997 | WO1997020316A2 Automated process for generating boards from defective chips |
| 06/05/1997 | WO1997014109A3 Data error detection and correction for a shared sram |
| 06/05/1997 | DE19545156A1 Testing method for efficient testing of micro-controllers |
| 06/04/1997 | EP0777236A1 Method and circuit for testing semiconductor memory units |
| 06/04/1997 | EP0485976B1 Fault analysis apparatus for memories having redundancy circuits |
| 06/03/1997 | US5636227 Integrated circuit test mechansim and method |
| 06/03/1997 | US5636225 Memory test circuit |
| 06/03/1997 | US5636172 Reduced pitch laser redundancy fuse bank structure |
| 06/03/1997 | US5636171 Semiconductor memory device having low power self refresh and burn-in functions |
| 06/03/1997 | US5636168 Method for testing a nonvolatile semiconductor memory device |
| 06/03/1997 | US5636167 For a semiconductor memory device |
| 06/03/1997 | US5636163 Random access memory with a plurality amplifier groups for reading and writing in normal and test modes |
| 06/03/1997 | US5636162 Erase procedure |
| 06/03/1997 | US5636161 Eprom bit-line interface for implementing programming, verification and testing |
| 06/03/1997 | US5635854 Programmable logic integrated circuit including verify circuitry for classifying fuse link states as validly closed, validly open or invalid |
| 05/28/1997 | EP0775956A1 Flash memory incorporating microcomputer having on-board writing function |
| 05/28/1997 | EP0520449B1 Semiconductor memory device |
| 05/27/1997 | US5634028 Compact track address translation mapping system and method |
| 05/27/1997 | US5633878 Self-diagnostic data buffers |
| 05/27/1997 | US5633877 Programmable built-in self test method and controller for arrays |
| 05/27/1997 | US5633830 Random access memory block circuitry for programmable logic array integrated circuit devices |
| 05/27/1997 | US5633828 Circuitry and methodology to test single bit failures of integrated circuit memory devices |
| 05/27/1997 | US5633827 Semiconductor integrated circuit device allowing change of product specification and chip screening method therewith |
| 05/27/1997 | US5633826 Semiconductor memory wherein a signal selectively substitutes a redundant memory cell link for a faulty ordinary memory cell link |
| 05/27/1997 | US5633824 File system for flash memory |
| 05/27/1997 | US5633209 Method of forming a circuit membrane with a polysilicon film |
| 05/21/1997 | EP0774716A1 Back-up unit |
| 05/20/1997 | US5631913 Test circuit and test method of integrated semiconductor device |
| 05/20/1997 | US5631911 Integrated test circuit |
| 05/20/1997 | US5631870 Semiconductor memory |
| 05/20/1997 | US5631868 Method and apparatus for testing redundant word and bit lines in a memory array |
| 05/20/1997 | US5631597 Negative voltage circuit for a flash memory |
| 05/15/1997 | WO1997017704A2 Method and device for automatic determination of the required high voltage for programming/erasing an eeprom |
| 05/14/1997 | EP0773552A2 An improved power-on reset circuit for controlling test mode entry |
| 05/14/1997 | EP0471544B1 Semiconductor memory with a sequence of clocked access codes for test mode entry |
| 05/14/1997 | EP0448970B1 An information processing device having an error check and correction circuit |
| 05/13/1997 | US5630044 Memory fault recovery system which executes degradation or recovery of memory |
| 05/13/1997 | US5629950 Fault management scheme for a cache memory |
| 05/13/1997 | US5629944 Test mode setting circuit of test circuit for semiconductor memory |
| 05/13/1997 | US5629943 Integrated circuit memory with double bitline low special test mode control from output enable |
| 05/13/1997 | US5629900 Semiconductor memory device operable to write data accurately at high speed |
| 05/13/1997 | US5629892 Flash EEPROM memory with separate reference array |
| 05/13/1997 | US5629889 Superconducting fault-tolerant programmable memory cell incorporating Josephson junctions |
| 05/13/1997 | US5629137 Method of repairing an integrated circuit structure |
| 05/07/1997 | EP0772358A1 Memory card apparatus |
| 05/07/1997 | EP0772202A2 Memory device with reduced number of fuses |
| 05/07/1997 | EP0772124A1 Memory flow control for a computer controlling a printing machine |
| 05/07/1997 | EP0467638B1 Semiconductor memory device |
| 05/06/1997 | US5627963 Redundant read bus for correcting defective columns in a cache memory |
| 05/06/1997 | US5627838 Automatic test circuitry with non-volatile status write |
| 05/06/1997 | US5627795 Timing generating device |
| 05/06/1997 | US5627787 Periphery stress test for synchronous RAMs |
| 05/06/1997 | US5627786 Parallel processing redundancy scheme for faster access times and lower die area |
| 05/06/1997 | US5627784 Memory system having non-volatile data storage structure for memory control parameters and method |
| 05/06/1997 | US5627780 Testing a non-volatile memory |
| 05/02/1997 | EP0771006A2 Semiconductor memory |
| 05/02/1997 | EP0770256A1 Testing of memory content |
| 05/01/1997 | WO1997015942A1 Loosely coupled mass storage computer cluster |
| 04/29/1997 | US5625786 Microprogram memory output circuit for selectively outputting fields of microinstruction word to a plurality of data terminals |
| 04/29/1997 | US5625597 DRAM having test circuit capable of performing function test of refresh counter and measurement of refresh cycle simultaneously |
| 04/29/1997 | US5625596 Semiconductor memory device with improved operating speed |
| 04/29/1997 | US5625591 Non-volatile semiconductor memory device |
| 04/29/1997 | US5625300 Separate IDDQ -testing of signal path and bias path in an IC |
| 04/24/1997 | WO1997015054A2 A flash eeprom memory with separate reference array |
| 04/23/1997 | EP0769743A2 Semiconductor memory device having small chip size and shortened redundancy access time |
| 04/23/1997 | EP0518603B1 Distributed sparing in DASD arrays |
| 04/22/1997 | US5623620 Special test modes for a page buffer shared resource in a memory device |
| 04/22/1997 | US5623448 Apparatus and method for implementing integrated circuit memory device component redundancy using dynamic power distribution switching |
| 04/17/1997 | WO1997014109A2 Data error detection and correction for a shared sram |
| 04/16/1997 | EP0768676A2 A semiconductor memory with sequential clocked access codes for test mode entry |
| 04/16/1997 | EP0768675A2 A semiconductor memory with a flag for indicating test mode |
| 04/16/1997 | EP0768599A1 On-line disk array reconfiguration |
| 04/16/1997 | EP0768538A1 Method, tester and circuit for applying a pulse trigger to a unit to be triggered |
| 04/16/1997 | EP0555307B1 A fault tolerant data storage system |
| 04/15/1997 | US5621883 Circuit for testing microprocessor memories |
| 04/15/1997 | US5621882 Disk array system and method of renewing data thereof |
| 04/15/1997 | US5621736 Formatting of a memory having defective cells |
| 04/15/1997 | US5621691 Column redundancy circuit and method of semiconductor memory device |
| 04/15/1997 | US5621690 Nonvolatile memory blocking architecture and redundancy |