Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
06/1998
06/10/1998DE19734908A1 Semiconductor memory with numerous pairs of bit lines
06/10/1998CN1184330A Semi-conductor memory device
06/10/1998CN1184316A Row redundancy block architecture
06/09/1998US5765198 Transparent relocation of real memory addresses in the main memory of a data processor
06/09/1998US5765185 EEPROM array with flash-like core having ECC or a write cache or interruptible load cycles
06/09/1998US5764952 Diagnostic system including a LSI or VLSI integrated circuit with a diagnostic data port
06/09/1998US5764878 Built-in self repair system for embedded memories
06/09/1998US5764655 Built in self test with memory
06/09/1998US5764654 Semiconductor integrated circuit device having a test circuit
06/09/1998US5764653 Method and apparatus for detecting abnormal operation in a storage circuit by monitoring an associated reference circuit
06/09/1998US5764652 Repair circuit of semiconductor memory device
06/09/1998US5764650 Intelligent binning for electrically repairable semiconductor chips
06/09/1998US5764592 External write pulse control method and structure
06/09/1998US5764587 Static wordline redundancy memory device
06/09/1998US5764577 Fusleless memory repair system and method of operation
06/09/1998US5764576 Semiconductor memory device and method of checking same for defect
06/09/1998US5764575 Replacement semiconductor read-only memory
06/09/1998US5764574 Semiconductor device assembly
06/09/1998US5764573 Semiconductor device capable of externally and readily identifying set bonding optional function and method of identifying internal function of semiconductor device
06/09/1998US5764569 Test structure and method to characterize charge gain in a non-volatile memory
06/09/1998US5764562 Semiconductor memory device
06/04/1998WO1998024028A1 Method and system for managing a flash memory mass storage system
06/04/1998DE19610555C2 Leckspannungs-Detektorschaltung für einen MOS Kondensator Leak voltage detection circuit for a MOS capacitor
06/03/1998EP0845788A2 A memory array test circuit with failure notification
06/03/1998EP0845680A1 Making and testing an integrated circuit using high density probe points
06/03/1998EP0845122A1 Memory tester providing fast repair of memory chips
06/03/1998EP0654168A4 Fault-tolerant, high-speed bus system and bus interface for wafer-scale integration.
06/03/1998EP0617362B1 Data back-up in data processing system
06/03/1998EP0579327B1 Integrated matrix memory with an addressing test circuit
06/03/1998CN1183647A Acceleration test method of semiconductor memory
06/02/1998US5761705 Methods and structure for maintaining cache consistency in a RAID controller having redundant caches
06/02/1998US5761222 Memory device having error detection and correction function, and methods for reading, writing and erasing the memory device
06/02/1998US5761215 Scan based path delay testing of integrated circuits containing embedded memory elements
06/02/1998US5761213 Method and apparatus to determine erroneous value in memory cells using data compression
06/02/1998US5761149 Dynamic RAM
06/02/1998US5761145 Efficient method for obtaining usable parts from a partially good memory integrated circuit
06/02/1998US5761143 Using an output of a leak detector which detects leakage from a dummy memory cell to control a subtrate voltage in a semi conductor memory device
06/02/1998US5761141 Semiconductor memory device and test method therefor
06/02/1998US5761140 Cache static RAM having a test circuit therein
06/02/1998US5761139 Semiconductor memory having redundancy memory cells
06/02/1998US5761138 Memory devices having a flexible redundant block architecture
06/02/1998US5761128 Non-volatile semiconductor memory device
06/02/1998US5761127 Flash-erasable semiconductor memory device having an improved reliability
06/02/1998US5761125 Cell threshold value distribution detection circuit and method of detecting cell threshold value
05/1998
05/28/1998WO1998022951A1 Memory tester with data compression
05/28/1998DE19752212A1 Error event counting method
05/28/1998DE19751546A1 Pattern generator
05/27/1998EP0844619A2 Nonvolatile semiconductor memory device having test circuit for testing erasing function thereof
05/27/1998EP0843852A1 Method and apparatus for detecting duplicate entries in a look-up table
05/27/1998EP0672985B1 Asynchronous remote data duplexing
05/27/1998EP0503100B1 Semiconductor memory
05/27/1998CN1183162A Nonvolatile memory blocking architecture and redundancy
05/27/1998CN1182938A 半导体电路装置 The semiconductor circuit device
05/26/1998US5758330 EPM having an improvement in non-volatile memory organization
05/26/1998US5758113 Refresh control for dynamic memory in multiple processor system
05/26/1998US5758063 Testing mapped signal sources
05/26/1998US5758056 Memory system having defective address identification and replacement
05/26/1998US5757817 Memory controller having automatic RAM detection
05/26/1998US5757815 Semiconductor memory test system
05/26/1998US5757814 Memory and test method therefor
05/26/1998US5757809 Semiconductor memory device
05/26/1998US5757716 Integrated circuit memory devices and methods including programmable block disabling and programmable block selection
05/26/1998US5757708 Semiconductor memory testing apparatus
05/26/1998US5757705 SDRAM clocking test mode
05/26/1998US5757691 Semiconductor memory device having wiring for selection of redundant cells but without useless region on chip
05/26/1998US5757228 Output driver circuit for suppressing noise generation and integrated circuit device for burn-in test
05/20/1998EP0843317A2 Method for testing of a field divided memory chip during run-time of a computer while maintaining real-time conditions
05/20/1998EP0842516A1 Method and apparatus for performing memory cell verification on a nonvolatile memory circuit
05/20/1998EP0842515A1 Memory system having non-volatile data storage structure for memory control parameters and method
05/20/1998DE19730347A1 Static semiconductor memory with several memory cells
05/20/1998DE19727789A1 Semiconductor circuit with internal voltage supply circuit for DRAM, SRAM
05/20/1998DE19719735A1 The method by using decoder to support defect memory
05/19/1998US5754758 Serial memory interface using interlaced scan
05/19/1998US5754566 Method and apparatus for correcting a multilevel cell memory by using interleaving
05/19/1998US5754558 Method and apparatus for screening a nonvolatile semiconductor memory device
05/19/1998US5754556 Semiconductor memory tester with hardware accelerators
05/19/1998US5754486 Self-test circuit for memory integrated circuits
05/19/1998US5754418 High voltage generation circuit for semiconductor memory device
05/14/1998WO1998020498A1 Defect analysis memory for memory tester
05/14/1998WO1998020497A1 Memory test system with defect compression
05/14/1998WO1998020495A1 Staggered row line firing in a single ras cycle
05/14/1998DE19748675A1 Pre-read-out for memory component selecting lower memory field
05/14/1998CA2270917A1 Memory test system with defect compression
05/13/1998EP0841667A2 Flash-erasable semiconductor memory device having an improved reliability
05/13/1998CN1181662A Method and apparatus for testing counter and serial access memory
05/13/1998CN1181505A Semiconductor device and internal function identification method of semiconductor device
05/12/1998US5751944 Non-volatile memory system having automatic cycling test function
05/12/1998US5751936 Checking for proper locations of storage devices in a storage device array
05/12/1998US5751742 Serially accessible memory means with high error correctability
05/12/1998US5751729 Method and apparatus for efficient self testing of on-chip memory
05/12/1998US5751728 Semiconductor memory IC testing device
05/12/1998US5751727 Dynamic latch circuit for utilization with high-speed memory arrays
05/12/1998US5751647 On-chip memory redundancy circuitry for programmable non-volatile memories, and methods for programming same
05/12/1998US5751646 Redundancy elements using thin film transistors (TFTS)
05/12/1998US5751641 Microprocessor memory test circuit and method
05/12/1998US5751633 Method of screening hot temperature erase rejects at room temperature
05/12/1998US5751627 Memory cell that can store data nonvolatily using a ferroelectric capacitor, and a semiconductor memory device including such a memory cell
05/12/1998US5751170 Circuit for low voltage sense amplifier
05/12/1998US5749698 Substrate transport apparatus and substrate transport path adjustment method
05/07/1998WO1998019343A1 Memory redundancy circuit using single polysilicon floating gate transistors as redundancy elements
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