Patents
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
06/1999
06/29/1999US5917766 Semiconductor memory device that can carry out read disturb testing and burn-in testing reliably
06/29/1999US5917765 Semiconductor memory device capable of burn in mode operation
06/29/1999US5917764 Semiconductor memory device
06/29/1999US5917763 Method and apparatus for repairing opens on global column lines
06/29/1999US5917750 Nonvolatile semiconductor memory with a protect circuit
06/29/1999CA2116818C Method for storing security relevant data
06/29/1999CA2004436C Test chip for use in semiconductor fault analysis
06/24/1999WO1999031661A1 Optical disc recording/reproducing method, optical disc, and optical disc device
06/24/1999WO1999031592A1 Flash memory system
06/24/1999WO1999031585A1 Monitoring system for a digital trimming cell
06/24/1999CA2313646A1 Monitoring system
06/23/1999EP0924765A2 Memory with word line voltage control
06/23/1999CN1220465A Memory with word line voltage control
06/22/1999US5915105 Memory device
06/22/1999US5915084 Scannable sense amplifier circuit
06/22/1999US5914964 Memory fail analysis device in semiconductor memory test system
06/22/1999US5914907 Semiconductor memory device capable of increasing chip yields while maintaining rapid operation
06/22/1999US5914905 Semiconductor integrated circuit
06/22/1999US5914902 Synchronous memory tester
06/22/1999US5913928 Data compression test mode independent of redundancy
06/17/1999WO1999030327A1 Semiconductor memory device, semiconductor device and electronic apparatus employing it
06/16/1999EP0923082A2 Semiconductor memory having a sense amplifier
06/16/1999EP0923029A1 Redundant memory, data processor using same, and method therefor
06/16/1999EP0549374B1 Nonvolatile semiconductor memory
06/16/1999CN1043694C Circuit for generating internal source voltage
06/15/1999US5913219 Database recovery apparatus and method of using dual plane nonvolatile memory
06/15/1999US5913020 Method for using fuse identification codes for masking bad bits on single in-line memory modules
06/15/1999US5912901 Method and built-in self-test apparatus for testing an integrated circuit which capture failure information for a selected failure
06/15/1999US5912899 Integrated memory device
06/15/1999US5912852 Synchronous memory test method
06/15/1999US5912851 Multi-bit semiconductor memory device allowing efficient testing
06/15/1999US5912850 Multi-port RAM with shadow write test enhancement
06/15/1999US5912841 Repair fuse circuit performing complete latch operation using flash memory cell
06/15/1999US5912836 Circuit for detecting both charge gain and charge loss properties in a non-volatile memory array
06/15/1999US5912579 Circuit for cancelling and replacing redundant elements
06/15/1999US5912564 Voltage-boosting circuit with mode signal
06/09/1999EP0921528A1 A memory device using direct access mode test and a method of testing the same
06/09/1999EP0920699A1 Antifuse detect circuit
06/09/1999EP0860011B1 Method and device for automatic determination of the required high voltage for programming/erasing an eeprom
06/09/1999CN1218962A Method and apparatus for detecting multiple cluster memory device with multiple memory clusters
06/09/1999CN1218961A Method for detecting memory unit
06/08/1999US5910923 Memory access circuits for test time reduction
06/08/1999US5910922 Method for testing data retention in a static random access memory using isolated Vcc supply
06/08/1999US5910921 Self-test of a memory device
06/08/1999US5910916 Flash-erasable semiconductor memory device having improved reliability
06/08/1999US5910181 Semiconductor integrated circuit device comprising synchronous DRAM core and logic circuit integrated into a single chip and method of testing the synchronous DRAM core
06/03/1999WO1999027453A1 Alignment of cluster address to block addresses within a semiconductor non-volatile mass storage memory
06/03/1999WO1999027431A2 A memory redundancy allocation system and a method of redundancy allocation
06/03/1999CA2310771A1 A memory redundancy allocation system and a method of redundancy allocation
06/02/1999EP0920032A2 Ferroelectric random access memory device having short-lived cell detector available for life test for ferroelectric capacitor and method for testing ferroelectric memory cells
06/02/1999EP0919917A2 Method to test the buffer memory of a microprocessor system
06/02/1999EP0919914A1 Architecture for managing vital data in a multi-modular machine and method for operating such an architecture
06/02/1999CN1218572A Circuit arrangement with test circuit
06/02/1999CN1218260A Ferroelectric random access memory device having short-lived cell detector AV ailable for life test for ferroelectric capacitor and method for testing ferroelectric memory cells
06/01/1999US5909657 Semiconductor device testing apparatus
06/01/1999US5909449 Multibit-per-cell non-volatile memory with error detection and correction
06/01/1999US5909448 Memory testing apparatus using a failure cell array
06/01/1999US5909404 Method for on-chip testing of a memory device
06/01/1999US5909402 Circuit for driving/controlling sensing amplifier
06/01/1999US5909399 Non-volatile semiconductor memory device and memory system using the same
06/01/1999US5909398 Semiconductor memory device and high-voltage switching circuit
06/01/1999US5909397 Method and system for testing and adjusting threshold voltages in flash eeproms
06/01/1999US5909395 Flash EEPROM with erase verification and address scrambling architecture
06/01/1999US5909390 Techniques of programming and erasing an array of multi-state flash EEPROM cells including comparing the states of the cells to desired values
05/1999
05/27/1999DE19751578A1 Read-only memory testing method for data processor ROM
05/26/1999CN1217548A Semiconductor storage device having address conversion circuit
05/26/1999CN1217547A Internal-circuit timed external regulation circuit and method therefor
05/26/1999CN1217546A Synchronous semiconductor storage device having timed circuit of controlling activation/non-activation of word line
05/26/1999CN1217545A Synchronous semiconductor storage device having circuit capable of reliably resetting detection means
05/25/1999US5907856 Moving sectors within a block of information in a flash memory mass storage architecture
05/25/1999US5907561 Method of testing semiconductor memory devices
05/25/1999US5907515 Semiconductor memory device
05/25/1999US5907514 Circuit and method for controlling a redundant memory cell in an integrated memory circuit
05/25/1999US5907513 Semiconductor memory device
05/25/1999US5907511 Electrically selectable redundant components for an embedded DRAM
05/25/1999US5907507 Microcomputer and multi-chip module
05/20/1999DE19851861A1 Fault analysis memory for semiconductor memory testers
05/19/1999EP0917059A1 A semiconductor memory device having an ECC circuit
05/19/1999EP0916140A1 Method and apparatus for self-testing multi-port rams
05/19/1999CN1217082A Data processor with built- in DRAM
05/19/1999CN1217062A Assembly and method for testing integrated circuit device
05/19/1999CN1216850A Semiconductor memory device with redundant decoder having small scale in circuitry
05/18/1999US5905986 Highly compressible representation of test pattern data
05/18/1999US5905854 Fault tolerant memory system
05/18/1999US5905737 Test circuit
05/18/1999US5905691 Semiconductor memory
05/18/1999US5905690 Synchronous semiconductor device having circuitry capable of surely resetting test mode
05/18/1999US5905688 Auto power down circuit for a semiconductor memory device
05/18/1999US5905687 Fuse refresh circuit
05/18/1999US5905683 Method and structure for recovering smaller density memories from larger density memories
05/18/1999US5905681 Redundant decoder utilizing address signal and burst length
05/18/1999US5905675 Biasing scheme for reducing stress and improving reliability in EEPROM cells
05/18/1999US5905650 Failure analyzer
05/18/1999US5905392 Auto-refresh control circuit for semiconductor device
05/18/1999US5905295 Reduced pitch laser redundancy fuse bank structure
05/14/1999WO1999023666A1 Circuit and method for stress testing eeproms
05/14/1999WO1999023665A1 Method for testing the bus terminals of writable-readable integrated electronic integrated circuits, especially of memory chips
05/12/1999EP0915421A2 Semiconductor memory device capable of preventing malfunction due to disconnection of column select line or word select line
05/12/1999DE19749240A1 Testing buffer memory of microprocessor system
05/12/1999CN1216388A Nonvolatile memory device and deterioration detecting