G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation

Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
12/1998
12/30/1998	WO1998059296A2 A method of updating program code for an optical disc drive microcontroller and an optical disc drive
12/30/1998	EP0887732A1 Defective management data handling method and recording medium
12/30/1998	CN1203427A Semiconductor memory
12/30/1998	CN1203425A Semiconductor memory
12/29/1998	US5854801 Pattern generation apparatus and method for SDRAM
12/29/1998	US5854796 Method of and apparatus for testing semiconductor memory
12/29/1998	US5854795 Memory capacity test method and computer system
12/29/1998	US5854766 Non-volatile semiconductor memory device with diagnostic potential generator for individually checking whether memory cells are over-erased
12/29/1998	US5854765 Semiconductor memory device
12/29/1998	US5854764 Sectorized electrically erasable and programmable non-volatile memory device with redundancy
12/29/1998	US5854762 Protection circuit for redundancy register set-up cells of electrically programmable non-volatile memory devices
12/24/1998	DE19757889A1 Semiconductor memory device, e.g. DRAM, with test mode
12/24/1998	DE19753496A1 Semiconductor memory, e.g. SDRAM
12/23/1998	WO1998058410A1 Semiconductor memory
12/23/1998	WO1998058386A1 Storage cell system and method for testing the function of storage cells
12/23/1998	EP0886280A1 Method of stress testing integrated circuit having memory and integrated circuit having stress tester for memory thereof
12/23/1998	EP0886213A2 Technique for reducing the amount of fuses in a DRAM with redundancy
12/23/1998	EP0557079B1 Discretionary lithography for integrated circuits
12/22/1998	US5852712 Microprocessor having single poly-silicon EPROM memory for programmably controlling optional features
12/22/1998	US5852618 Multiple bit test pattern generator
12/22/1998	US5852581 Method of stress testing memory integrated circuits
12/22/1998	US5852580 Repair fuse circuit in a flash memory device
12/17/1998	WO1998039777A3 Self-test for integrated memories
12/17/1998	DE19823485A1 Device for fixing address signal changes in solid state memory
12/16/1998	EP0884735A2 Semiconductor memory device capable of multiple word-line selection and method of testing same
12/16/1998	EP0884734A1 Nonvolatile semiconductor memory
12/16/1998	EP0884680A1 ROM testing circuit
12/16/1998	EP0883878A1 Circuit arrangement for a programmable non-volatile memory
12/16/1998	CN1202263A Method and device for automatic determination of required high voltage for programming/erasing eeprom
12/15/1998	US5850528 Bus timing protocol for a data storage system
12/15/1998	US5850509 Circuitry for propagating test mode signals associated with a memory array
12/15/1998	US5850402 Test pattern generator
12/15/1998	US5850361 Programmable memory with single bit encoding
12/10/1998	WO1998055924A1 Device for saving the configuration of a redundant system
12/10/1998	DE19823503A1 Method for performing semiconductor component test system
12/09/1998	EP0883134A1 Electrically programmable non-volatile memory integrated circuit with configuration register
12/09/1998	EP0882239A1 Assembly and method for testing integrated circuit devices
12/09/1998	EP0568015B1 Dynamic random access memory device with intermediate voltage generator interrupting power supply in test operation
12/09/1998	CN1201149A Semiconductor integrated circuit device having exact self-diagnosis function
12/08/1998	US5848077 Scanning memory device and error correction method
12/08/1998	US5848074 Method and device for testing content addressable memory circuit and content addressable memory circuit with redundancy function
12/08/1998	US5848021 Semiconductor memory device having main word decoder skipping defective address during sequential access and method of controlling thereof
12/08/1998	US5848018 Memory-row selector having a test function
12/08/1998	US5848017 Method and apparatus for stress testing a semiconductor memory
12/08/1998	US5848016 Merged Memory and Logic (MML) integrated circuits and methods including serial data path comparing
12/08/1998	US5848010 Circuit and method for antifuse stress test
12/08/1998	US5848009 Integrated circuit memory devices that map nondefective memory cell blocks into continuous addresses
12/08/1998	US5848008 Floating bitline test mode with digitally controllable bitline equalizers
12/08/1998	US5848007 Redundancy circuit for semiconductor storage apparatus
12/08/1998	US5848006 Redundant semiconductor memory device using a single now address decoder for driving both sub-wordlines and redundant sub-wordlines
12/08/1998	US5848003 Semiconductor memory
12/08/1998	US5847995 Nonvolatile semiconductor memory device having a plurality of blocks provided on a plurality of electrically isolated wells
12/08/1998	US5847987 Low currency redundancy anti-fuse method and apparatus
12/08/1998	US5847595 Semiconductor device having controllable internal potential generating circuit
12/08/1998	US5847591 Voltage detection circuit and internal voltage clamp circuit
12/03/1998	WO1998054729A1 Method and apparatus for self-testing multi-port rams
12/03/1998	WO1998054727A2 256 Meg DYNAMIC RANDOM ACCESS MEMORY
12/02/1998	EP0881590A1 Communications protocol for asynchronous IC cards
12/02/1998	EP0881573A1 Semiconductor device with test circuit
12/02/1998	EP0881571A1 Semiconductor memory device with redundancy
12/02/1998	EP0829086A4 Technique for reconfiguring a high density memory
12/02/1998	EP0561765B1 Novel method of making, testing and test device for integrated circuits
12/02/1998	CN1200544A Semiconductor device with increased replacement efficiency by redundant memory cell arrays
12/02/1998	CN1200513A Test method of cache memory of multiprocessor system
12/01/1998	US5845313 Direct logical block addressing flash memory mass storage architecture
12/01/1998	US5845059 For use in a memory device
12/01/1998	US5844924 Main signal memory supervisory control system using odd-even alternative check
12/01/1998	US5844915 Method for testing word line leakage in a semiconductor memory device
12/01/1998	US5844914 Test circuit and method for refresh and descrambling in an integrated memory circuit
12/01/1998	US5844912 Fast verify for CMOS memory cells
12/01/1998	US5844910 Flash-erase-type nonvolatile semiconductor storage device
12/01/1998	US5844429 Of a semiconductor device
12/01/1998	US5843799 Circuit module redundancy architecture process
11/1998
11/25/1998	EP0674263B1 Asynchronous remote data copying
11/24/1998	US5841961 Semiconductor memory device including a tag memory
11/24/1998	US5841957 Programmable I/O remapper for partially defective memory devices
11/24/1998	US5841789 Apparatus for testing signal timing and programming delay
11/24/1998	US5841786 Testing of memory content
11/24/1998	US5841785 Memory testing apparatus for testing a memory having a plurality of memory cell arrays arranged therein
11/24/1998	US5841784 Testing and repair of embedded memory
11/24/1998	US5841783 Fail address analysis and repair system for semiconductor test
11/24/1998	US5841715 Integrated circuit I/O using high performance bus interface
11/24/1998	US5841714 Supervoltage circuit
11/24/1998	US5841712 Dual comparator circuit and method for selecting between normal and redundant decode logic in a semiconductor memory device
11/24/1998	US5841711 Semiconductor memory device with redundancy switching method
11/24/1998	US5841710 Memory system
11/24/1998	US5841709 Memory having and method for testing redundant memory cells
11/24/1998	US5841708 Semiconductor memory device having small chip size and redundancy access time
11/24/1998	US5841699 Storage device and method to detect its degradation
11/24/1998	US5841691 Adjustable cell plate generator
11/24/1998	US5841580 Memory device
11/24/1998	US5841271 Test mode power circuit for integrated-circuit chip
11/24/1998	US5840593 Membrane dielectric isolation IC fabrication
11/19/1998	DE19705355A1 Verfahren zur Minimierung der Zugriffszeit bei Halbleiterspeichern A method for minimizing the access time in semiconductor memories
11/17/1998	US5838895 Fault detection and automatic recovery apparatus or write-read pointers in First-In First-Out
11/17/1998	US5838893 Method and system for remapping physical memory
11/17/1998	US5838627 Arrangement of power supply and data input/output pads in semiconductor memory device
11/17/1998	US5838626 Non-volatile memory
11/17/1998	US5838623 Method for detecting redunded defective addresses in a memory device with redundancy
11/17/1998	US5838621 Spare decoder circuit

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