| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 05/11/1999 | US5903582 Memory circuit |
| 05/11/1999 | US5903576 Memory test system |
| 05/11/1999 | US5903575 Semiconductor memory device having fast data writing mode and method of writing testing data in fast data writing mode |
| 05/11/1999 | US5903512 In a computer system |
| 05/11/1999 | US5903505 Method of testing memory refresh operations wherein subthreshold leakage current may be set to near worst-case conditions |
| 05/11/1999 | US5903502 Variable equilibrate voltage circuit for paired digit lines |
| 05/06/1999 | WO1999010893A3 Object reconstruction on object oriented data storage device |
| 05/06/1999 | EP0913837A1 Method for testing bus connections of read/write integrated electronic circuits, in particular memory circuits |
| 05/06/1999 | EP0913773A1 Memory redundancy circuit for high density memory with extra row and column |
| 05/06/1999 | EP0912979A1 Semiconductor memory tester with redundancy analysis |
| 05/06/1999 | EP0912939A2 Flash memory card |
| 05/04/1999 | US5901281 Processing unit for a computer and a computer system incorporating such a processing unit |
| 05/04/1999 | US5901161 Initialization data redundancy system |
| 05/04/1999 | US5901154 Method for producing test program for semiconductor device |
| 05/04/1999 | US5901106 Decoder circuit using redundancy signal having a short pulse format |
| 05/04/1999 | US5901105 Dynamic random access memory having decoding circuitry for partial memory blocks |
| 05/04/1999 | US5901096 Semiconductor memory device capable of disconnecting an internal booster power supply from a selected word line in response to a test signal and testing method therefor |
| 05/04/1999 | US5901095 Reprogrammable address selector for an embedded DRAM |
| 05/04/1999 | US5901093 Redundancy architecture and method for block write access cycles permitting defective memory line replacement |
| 05/04/1999 | US5901082 Endurance testing system for an EEPROM |
| 05/04/1999 | US5901080 Nonvolatile semiconductor memory device |
| 05/04/1999 | US5900756 Integrated circuit receiving a binary control signal |
| 05/04/1999 | US5900739 Method and apparatus for entering a test mode of an externally non-programmable device |
| 04/29/1999 | WO1999006911A3 Method for generating an error identification signal in the data inventory of a memory, and device designed for that purpose |
| 04/29/1999 | WO1998047060A9 Systems and methods for protecting access to encrypted information |
| 04/29/1999 | DE19604375C2 Verfahren zur Auswertung von Testantworten zu prüfender digitaler Schaltungen und Schaltungsanordnung zur Durchführung des Verfahrens Method for evaluating test responses to be tested digital circuits and circuit arrangement for performing the method |
| 04/28/1999 | EP0911833A2 Multi-level non-volatile memory with error detection and correction |
| 04/28/1999 | EP0911832A2 Memory cell having programmed margin verification |
| 04/28/1999 | EP0911747A1 CAD for redundant memory devices |
| 04/28/1999 | EP0910826A1 Block erasable memory system defect handling |
| 04/28/1999 | EP0601441B1 Information recording/reproducing apparatus |
| 04/27/1999 | US5898704 Processing system having testing mechanism |
| 04/27/1999 | US5898700 Test signal generator and method for testing a semiconductor wafer having a plurality of memory chips |
| 04/27/1999 | US5898629 System for stressing a memory integrated circuit die |
| 04/27/1999 | US5898627 Semiconductor memory having redundant memory cell array |
| 04/27/1999 | US5898626 Redundancy programming circuit and system for semiconductor memory |
| 04/27/1999 | US5898620 Method for detecting erroneously programmed memory cells in a memory |
| 04/27/1999 | US5898615 Semiconductor memory device having non-volatile memory cells connected in series |
| 04/27/1999 | US5898324 High voltage detector circuit |
| 04/27/1999 | US5897599 Control system for a vehicle safety device with EEPROM memory for storing gain |
| 04/27/1999 | CA2074990C Data processing device comprising a multiport ram as a sequential circuit |
| 04/22/1999 | WO1999019877A1 Programmable logic device memory cell circuit |
| 04/21/1999 | EP0910097A1 Integrated memory circuit including an internal high programming voltage generation circuit |
| 04/21/1999 | CN1214517A Semiconductor memory circuit having shift redundancy circuits |
| 04/21/1999 | CN1043081C Burn-in enable circuit of semiconductor memory device and burn-in test method thereof |
| 04/20/1999 | US5896404 Programmable burst length DRAM |
| 04/20/1999 | US5896400 Memory circuit with switch for selectively connecting an input/output pad directly to a nonvolatile memory cell |
| 04/20/1999 | US5896399 System and method for testing self-timed memory arrays |
| 04/20/1999 | US5896398 Flash memory test system |
| 04/20/1999 | US5896396 Method and apparatus for scan test of SRAM for microprocessors without full scan capability |
| 04/20/1999 | US5896395 Integrated circuit memory devices and operating methods including temporary data path width override |
| 04/20/1999 | US5896342 Semiconductor memory device having collective writing mode for writing data on row basis |
| 04/20/1999 | US5896334 Circuit and method for memory device with defect current isolation |
| 04/20/1999 | US5896333 Semiconductor memory testing apparatus |
| 04/20/1999 | US5896332 Method and apparatus for measuring the offset voltages of SRAM sense amplifiers |
| 04/20/1999 | US5896331 Reprogrammable addressing process for embedded DRAM |
| 04/20/1999 | US5896330 Multi-port random access memory with shadow write test mode |
| 04/20/1999 | US5896328 Semiconductor memory device allowing writing of desired data to a storage node of a defective memory cell |
| 04/20/1999 | US5896327 Memory redundancy circuit for high density memory with extra row and column for failed address storage |
| 04/20/1999 | US5896326 Semiconductor memory and a column redundancy discrimination circuit applied therein |
| 04/20/1999 | US5896324 Overvoltage detection circuit for generating a digital signal for a semiconductor memory device in parallel test mode |
| 04/20/1999 | US5896041 Method and apparatus for programming anti-fuses using internally generated programming voltage |
| 04/20/1999 | US5896040 Configurable probe pads to facilitate parallel testing of integrated circuit devices |
| 04/20/1999 | US5896039 Configurable probe pads to facilitate parallel testing of integrated circuit devices |
| 04/20/1999 | US5895483 Disk array system for performing frequency division multiplex transmissions |
| 04/15/1999 | WO1999018531A1 Automatic test process with non-volatile result table store |
| 04/15/1999 | WO1999018509A1 Moving sequential sectors within a block of information in a flash memory mass storage architecture |
| 04/15/1999 | DE19824208A1 Fault analysis method for defect detection in semiconductor device |
| 04/15/1999 | DE19819240A1 Semiconductor device with noise elimination circuit |
| 04/15/1999 | DE19745222A1 Data securing and restoring in data processor |
| 04/14/1999 | EP0677849B1 Multiple I/O select memory |
| 04/13/1999 | US5894445 Semiconductor memory device |
| 04/13/1999 | US5894441 Semiconductor memory device with redundancy circuit |
| 04/13/1999 | US5894295 Image display device |
| 04/08/1999 | WO1999017298A1 Method for testing a solid state memory |
| 04/08/1999 | WO1999017297A1 Digital storage and operating method for the same |
| 04/08/1999 | WO1999017237A1 Method for making integrated memory topograms |
| 04/08/1999 | WO1999004400A3 Synchronous memory identification system |
| 04/08/1999 | WO1999004327A3 Synchronous memory test system |
| 04/08/1999 | DE19823930A1 Integrated solid state circuit with DRAM memory |
| 04/08/1999 | DE19743001A1 Verfahren zum Testen von Halbleiterspeichern A method for testing of semiconductor memories |
| 04/08/1999 | DE19742597A1 Digitaler Speicher und Betriebsverfahren für einen digitalen Speicher Digital memory and method of operating a digital memory |
| 04/07/1999 | EP0907185A2 Floating bitline test mode with digitally controllable bitline equalizers |
| 04/07/1999 | EP0907184A2 Apparatus and method for implementing a bank interlock scheme and related test mode for multi-bank memory devices |
| 04/07/1999 | EP0907128A1 Storage devices, and data processing systems and methods |
| 04/07/1999 | EP0808486B1 Parallel processing redundancy apparatus and method for faster access time and lower die area |
| 04/07/1999 | CN1213455A Memory test set |
| 04/07/1999 | CN1213143A Semiconductor device with plural power supply circuits, plural internal circuit, and single external terminal |
| 04/06/1999 | US5892896 Computer system including memory and method for disconnecting memory card having predetermined fault |
| 04/06/1999 | US5892776 Semiconductor memory and test method incorporating selectable clock signal modes |
| 04/06/1999 | US5892775 Method and apparatus for providing error-tolerant storage of information |
| 04/06/1999 | US5892721 Parallel test circuit for memory device |
| 04/06/1999 | US5892720 Semiconductor memory with test circuit |
| 04/06/1999 | US5892719 Redundancy circuit technique applied DRAM of multi-bit I/O having overlaid-DQ bus |
| 04/06/1999 | US5892718 Semiconductor memory device having a redundancy function |
| 04/06/1999 | US5892716 Method and apparatus for global testing the impedance of a programmable element |
| 04/06/1999 | US5892386 Internal power control circuit for a semiconductor device |
| 04/01/1999 | WO1998059296A3 A method of updating program code for an optical disc drive microcontroller and an optical disc drive |
| 03/31/1999 | EP0905766A1 Structure and method to repair integrated circuits |
| 03/31/1999 | EP0905711A2 Nonvolatile memory device and deterioration detecting method |