| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 02/10/1999 | EP0770256B1 Testing of memory content |
| 02/10/1999 | CN1207559A Semiconductor memory device capable of realization stable test mode operation |
| 02/09/1999 | US5870520 Flash disaster recovery ROM and utility to reprogram multiple ROMS |
| 02/09/1999 | US5870407 Method of screening memory cells at room temperature that would be rejected during hot temperature programming tests |
| 02/09/1999 | US5870348 Dynamic semiconductor memory device having excellent charge retention characteristics |
| 02/09/1999 | US5870342 Semiconductor memory device surely reset upon power on |
| 02/09/1999 | US5870341 Memory column redundancy circuit |
| 02/09/1999 | US5870337 Flash-erasable semiconductor memory device having an improved reliability |
| 02/09/1999 | US5870333 Read voltage control device for semiconductor memory device |
| 02/09/1999 | US5869980 Programming programmable transistor devices using state machines |
| 02/09/1999 | US5869354 Forming a etch stop layer in the substrate parallel to the principal surface, forming semiconductor on the principal surface, depositing a low stress dielectric membranes over semiconductor, etching etch barrier and a substrate portion |
| 02/04/1999 | WO1999005682A1 Method and apparatus for reading compressed test data from memory devices |
| 02/04/1999 | WO1999005599A1 Apparatus and method for memory error detection and error reporting |
| 02/04/1999 | DE19832960A1 DRAM semiconductor memory with burn-in function |
| 02/04/1999 | DE19734554A1 Elektronische Anordnung zur sicheren Datenverarbeitung An electronic device for secure data processing |
| 02/03/1999 | EP0895246A1 A single chip controller-memory device and a memory architecture and methods suitable for implementing the same |
| 02/03/1999 | EP0895245A2 Synchronous semiconductor memory device |
| 02/03/1999 | EP0895160A1 Semiconductor memory with select line clamping circuit for preventing malfunction |
| 02/03/1999 | CN1041975C Semiconductor IC with stress circuit and method for supplying stress voltage thereof |
| 02/02/1999 | US5867719 Method and apparatus for testing on-chip memory on a microcontroller |
| 02/02/1999 | US5867642 System and method to coherently and dynamically remap an at-risk memory area by simultaneously writing two memory areas |
| 02/02/1999 | US5867511 Method for high-speed recoverable directory access |
| 02/02/1999 | US5867505 Method and apparatus for testing an integrated circuit including the step/means for storing an associated test identifier in association with integrated circuit identifier for each test to be performed on the integrated circuit |
| 02/02/1999 | US5867504 Semiconductor memory device with row and column redundancy circuits and a time-shared redundancy circuit test architecture. |
| 02/02/1999 | US5867439 Semiconductor memory device having internal address converting function, whose test and layout are conducted easily |
| 02/02/1999 | US5867436 Random access memory with a plurality amplifier groups for reading and writing in normal and test modes |
| 02/02/1999 | US5867435 Fault repair method for a memory device |
| 02/02/1999 | US5867433 Semiconductor memory with a novel column decoder for selecting a redundant array |
| 02/02/1999 | CA2145409C Computer failure recovery and alert system |
| 01/28/1999 | WO1999004400A2 Synchronous memory identification system |
| 01/28/1999 | WO1999004397A1 Nested loop method of identifying synchronous memories |
| 01/28/1999 | WO1999004327A2 Synchronous memory test system |
| 01/27/1999 | EP0893764A2 Integrated circuit with programmable latch circuit |
| 01/27/1999 | EP0559487B1 Handling data in a system having a processor for controlling access to a plurality of data storage disks |
| 01/27/1999 | CN1206247A Improved techniques for reducing redundant element fuses in dynamic random access memory array |
| 01/26/1999 | USRE36061 Integrated semiconductor memory |
| 01/26/1999 | US5864661 IC memory card having flash memory |
| 01/26/1999 | US5864566 In a semiconductor device |
| 01/26/1999 | US5864562 Circuit for transferring redundancy data of a redundancy circuit inside a memory device by means of a time-shared approach |
| 01/26/1999 | US5864510 Semiconductor memory device having a bit compressed test mode and a check mode selecting section |
| 01/26/1999 | US5864501 Test pattern structure for endurance test of a flash memory device |
| 01/26/1999 | CA2159036C Method for identifying untestable & redundant faults in sequential logic circuits |
| 01/21/1999 | WO1999003105A1 Memory device having selectable redundancy for high endurance and reliability and method therefor |
| 01/21/1999 | WO1999003041A1 Memory control method |
| 01/21/1999 | DE19831573A1 Testing arrangement for integrated circuits |
| 01/21/1999 | DE19809271A1 Semiconductor dynamic memory device with test configuration |
| 01/20/1999 | EP0892350A2 Method for redundancy replacement in a memory device |
| 01/20/1999 | EP0892349A2 Redundancy replacement configuration for a memory device |
| 01/20/1999 | EP0891623A1 Circuit arrangement with a test circuit |
| 01/20/1999 | CN1205524A Semiconductor memory testing apparatus |
| 01/20/1999 | CN1205522A Semiconductor device having contact check circuit |
| 01/20/1999 | CN1205521A Variable domain redundancy replacement configuration for memory device |
| 01/20/1999 | CN1205520A Semiconductor memory redundant circuit |
| 01/20/1999 | CN1205476A Improved redundant circuits and methods therefor |
| 01/19/1999 | US5862406 Array recording system reporting completion of writing data operation prior to the completion of writing redundancy data in alternative recording units |
| 01/19/1999 | US5862314 System and method for remapping defective memory locations |
| 01/19/1999 | US5862312 Loosely coupled mass storage computer cluster |
| 01/19/1999 | US5862151 Array self-test fault tolerant programmable threshold algorithm |
| 01/19/1999 | US5862147 Semiconductor device on semiconductor wafer having simple wirings for test and capable of being tested in a short time |
| 01/19/1999 | US5862146 Process of testing memory parts and equipment for conducting the testing |
| 01/19/1999 | US5862097 Semiconductor memory device |
| 01/19/1999 | US5862094 Semiconductor device and a semiconductor memory device |
| 01/19/1999 | US5862088 Apparatus and method for testing a memory |
| 01/19/1999 | US5862087 Redundancy circuit for memory devices having high frequency addressing cycles |
| 01/19/1999 | US5862086 Semiconductor storage device |
| 01/19/1999 | US5862083 Information processing system |
| 01/19/1999 | US5862081 Multi-state flash EEPROM system with defect management including an error correction scheme |
| 01/19/1999 | US5862080 Multi-state flash EEprom system with defect handling |
| 01/19/1999 | US5861660 Integrated-circuit die suitable for wafer-level testing and method for forming the same |
| 01/14/1999 | WO1999001871A1 Memory characterisation means and method |
| 01/14/1999 | DE19830362A1 Semiconductor memory device or arrangement |
| 01/14/1999 | DE19829234A1 Testing semiconductor memory having data cell and correction code fields |
| 01/13/1999 | EP0890956A2 Semiconductor device having a security circuit for preventing illegal access |
| 01/13/1999 | EP0890902A2 Redundancy circuit for semiconductor memory devide |
| 01/13/1999 | CN1205106A Memory test circuit |
| 01/13/1999 | CN1204892A Memory address generator in convolutional interleaver/deinterleaver |
| 01/13/1999 | CN1204806A Data management apparatus, data management method, and recording medium |
| 01/12/1999 | US5860135 File managing device of a non-volatile memory, a memory card and method for controlling a file system |
| 01/12/1999 | US5860128 Method for accessing a memory |
| 01/12/1999 | US5860122 Backup unit including identifier conversion means |
| 01/12/1999 | US5859961 Renumbered array architecture for multi-array memories |
| 01/12/1999 | US5859960 Semiconductor disk apparatus having a semiconductor memory for a recording medium |
| 01/12/1999 | US5859858 Method and apparatus for correcting a multilevel cell memory by using error locating codes |
| 01/12/1999 | US5859804 Method and apparatus for real time two dimensional redundancy allocation |
| 01/12/1999 | US5859803 Non-volatile circuit that disables failed devices |
| 01/12/1999 | US5859802 Integrated circuit memory devices having main and section row decoders for providing improved burst mode operation |
| 01/12/1999 | US5859801 Flexible fuse placement in redundant semiconductor memory |
| 01/07/1999 | EP0889479A1 Data processor with built-in dram |
| 01/07/1999 | EP0889409A1 Mirrored write-back cache module warmswap |
| 01/07/1999 | EP0889408A2 Techniques for reducing the amount of fuses in a DRAM with redundancy |
| 01/07/1999 | DE19725581A1 Anordnung mit Speicherzellen und Verfahren zur Funktionsüberprüfung von Speicherzellen Arrangement with memory cells and methods for functional testing of memory cells |
| 01/06/1999 | CN1204127A Test method of high speed memory devices in which limit conditions for clock signals are defined |
| 01/06/1999 | CN1204125A Test method for high speed memory devices by using clock modulation technique |
| 01/06/1999 | CN1204058A Test method of integrated circuit devices by using dual edge clock technique |
| 01/06/1999 | CN1204056A Method for detecting operational errors of tester for semiconductor devices |
| 01/06/1999 | CN1041581C Semiconductor memory and method of setting type |
| 01/05/1999 | US5856985 For generating expected value data to carry out logical comparison |
| 01/05/1999 | US5856982 High-speed disturb testing method and word line decoder in semiconductor memory device |
| 01/05/1999 | US5856950 Cancellation of redundant elements with a cancel bank |
| 01/05/1999 | US5856948 Sychronous memory burn-in method |