Patents
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
09/1999
09/29/1999EP0945803A2 Redundancy word line replacement in semiconductor memory device
09/29/1999EP0945802A2 Semiconductor memory device with redundancy
09/29/1999CN1229999A Semiconductor memory device, and method of checking the semiconductor device and method of using the same
09/29/1999CN1229924A IC testing apparatus
09/29/1999CN1045345C Row redundancy circuit and method for semiconductor memory device with double row decoder
09/28/1999USRE36319 Structure for deselective broken select lines in memory arrays
09/28/1999US5960457 Cache coherency test system and methodology for testing cache operation in the presence of an external snoop
09/28/1999US5960008 Test circuit
09/28/1999US5959932 Method and apparatus for detecting errors in the writing of data to a memory
09/28/1999US5959917 Circuit for detecting the coincidence between a binary information unit stored therein and an external datum
09/28/1999US5959915 Test method of integrated circuit devices by using a dual edge clock technique
09/28/1999US5959914 Memory controller with error correction memory test application
09/28/1999US5959913 Device and method for stress testing a semiconductor memory
09/28/1999US5959912 ROM embedded mask release number for built-in self-test
09/28/1999US5959911 Apparatus and method for implementing a bank interlock scheme and related test mode for multibank memory devices
09/28/1999US5959910 Sense amplifier control of a memory device
09/28/1999US5959909 Memory circuit with auto redundancy
09/28/1999US5959908 Semiconductor memory device having spare word lines
09/28/1999US5959907 Semiconductor memory device having a redundancy circuit
09/28/1999US5959906 Semiconductor memory device with a fully accessible redundant memory cell array
09/28/1999US5959904 Dynamic column redundancy driving circuit for synchronous semiconductor memory device
09/28/1999US5959903 Column redundancy in semiconductor memories
09/28/1999US5959891 Evaluation of memory cell characteristics
09/28/1999US5959890 Non-volatile semiconductor memory device
09/28/1999US5959860 Method and apparatus for operating an array of storage devices
09/28/1999US5959467 High speed dynamic differential logic circuit employing capacitance matching devices
09/28/1999US5959445 Static, high-sensitivity, fuse-based storage cell
09/28/1999US5958074 Data processor having data bus and instruction fetch bus provided separately from each other
09/28/1999US5958065 Content addressable bit replacement memory
09/23/1999WO1999039218A3 Circuit with interconnect test unit and a method of testing interconnects between a first and a second electronic circuit
09/22/1999EP0944094A2 Flash memory with improved erasability and its circuitry
09/22/1999EP0820631B1 Circuit for sram test mode isolated bitline modulation
09/22/1999CN1229249A Semiconductor memory device having means for outputting redundancy replacement selection signal
09/21/1999US5956475 Computer failure recovery and alert system
09/21/1999US5956473 Method and system for managing a flash memory mass storage system
09/21/1999US5956352 Adjustable filter for error detecting and correcting system
09/21/1999US5956350 Built in self repair for DRAMs using on-chip temperature sensing and heating
09/21/1999US5956349 Semiconductor memory device for high speed data communication capable of accurate testing of pass/fail and memory system employing the same
09/21/1999US5956282 Antifuse detect circuit
09/21/1999US5956281 Semiconductor memory device capable of setting substrate voltage shallow in disturb test mode and self refresh mode
09/21/1999US5956280 Contact test method and system for memory testers
09/21/1999US5956279 Static random access memory device with burn-in test circuit
09/21/1999US5956278 Semiconductor circuit device with internal power supply circuit
09/21/1999US5956277 Circuit and method for performing tests on memory array cells using external sense amplifier reference current
09/21/1999US5956276 Semiconductor memory having predecoder control of spare column select lines
09/21/1999US5956275 Memory-cell array and a method for repairing the same
09/21/1999US5954831 Method for testing a memory device
09/21/1999US5954830 Method and apparatus for achieving higher performance data compression in ABIST testing by reducing the number of data outputs
09/21/1999US5954828 Non-volatile memory device for fault tolerant data
09/21/1999US5954822 Disk array apparatus that only calculates new parity after a predetermined number of write requests
09/21/1999US5954804 Synchronous memory device having an internal register
09/21/1999US5954435 Memory apparatus and data processor using the same
09/21/1999US5954205 Circuit board handling and testing apparatus
09/16/1999WO1999046778A2 High speed memory test system with intermediate storage buffer and method of testing
09/16/1999WO1999046675A2 State copying method for software update
09/16/1999DE19819254A1 Semiconductor DRAM component with integral test circuit
09/16/1999DE19810814A1 Software processing device with software actualization function
09/16/1999CA2347549A1 High speed memory test system with intermediate storage buffer and method of testing
09/15/1999CN1045133C Semiconductor memory apparatus
09/14/1999US5953745 Redundant memory array
09/14/1999US5953737 Method and apparatus for performing erase operations transparent to a solid state storage system
09/14/1999US5953282 Circuit for generating switching control signal
09/14/1999US5953279 Fuse option circuit for memory device
09/14/1999US5953273 Semiconductor integrated circuit device having confirmable self-diagnostic function
09/14/1999US5953272 Data invert jump instruction test for built-in self-test
09/14/1999US5953271 Semiconductor memory device allowing acceleration testing, and a semi-finished product for an integrated semiconductor device that allows acceleration testing
09/14/1999US5953270 Column redundancy circuit for a memory device
09/14/1999US5953269 Method and apparatus for remapping addresses for redundancy
09/14/1999US5953268 Memory block replacement system and replacement method for a semiconductor memory
09/14/1999US5953267 Synchronous dynamic random access memory for stabilizing a redundant operation
09/14/1999US5953266 Device and method for repairing a memory array by storing each bit in multiple memory cells in the array
09/14/1999US5953264 Redundant memory cell selecting circuit having fuses coupled to memory cell group address and memory cell block address
09/14/1999US5953261 Semiconductor memory device having data input/output circuit of small occupied area capable of high-speed data input/output
09/14/1999US5953258 Data transfer in a memory device having complete row redundancy
09/14/1999US5953253 Word addressable floating-gate memory comprising a reference voltage generator circuit for the verification of the contents of a word
09/14/1999US5952844 Apparatus for testing semiconductor IC (integrated circuit)
09/14/1999US5951702 For an integrated circuit
09/14/1999US5951692 Single-chip memory system having a redundancy judging circuit
09/14/1999US5951655 External storage subsystem having independent access paths for permitting independent access from a host and a storage device to respective cache memories
09/10/1999WO1999044752A2 Circuit and method for specifying performance parameters in integrated circuits
09/10/1999WO1999027431A9 A memory redundancy allocation system and a method of redundancy allocation
09/08/1999EP0940753A2 Semiconductor memory device
09/08/1999EP0940752A1 Method for error correction in a multilevel semiconductor memory
09/08/1999CN1227952A Semiconductor memory device incorporating redundancy memory cells having uniform layout
09/08/1999CN1227950A Method for creating defect management information in recording medium, and apparatus and medium based on said method
09/07/1999US5950181 Apparatus and method for detecting and assessing a spatially discrete dot pattern
09/07/1999US5950145 Low voltage test mode operation enable scheme with hardware safeguard
09/07/1999US5949731 Semiconductor memory device having burn-in mode operation stably accelerated
09/07/1999US5949726 Bias scheme to reduce burn-in test time for semiconductor memory while preventing junction breakdown
09/07/1999US5949725 Method and apparatus for reprogramming a supervoltage circuit
09/07/1999US5949724 Burn-in stress circuit for semiconductor memory device
09/07/1999US5949723 Fast single ended sensing with configurable half-latch
09/07/1999US5949703 Semiconductor memory device in which data in programmable ROM can be apparently rewritten
09/07/1999US5949701 Memory circuit with a connection layout and a method for testing and a wiring design apparatus
09/07/1999US5948115 Event phase modulator for integrated circuit tester
09/07/1999US5948114 Integrated circuit binary data output interface for multiplexed output of internal binary information elements from input/output pads
09/02/1999WO1999044113A2 Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices
09/01/1999EP0939403A2 High-speed error correcting apparatus with efficient data transfer
09/01/1999EP0842515A4 Memory system having non-volatile data storage structure for memory control parameters and method
09/01/1999CN1227386A Semiconductor memory device