Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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01/06/2000 | WO2000000836A1 A skew calibration means and a method of skew calibration |
01/06/2000 | CA2346883A1 A skew calibration means and a method of skew calibration |
01/05/2000 | EP0969480A1 Encoding method and memory device |
01/05/2000 | EP0716421B1 A method for testing an array of Random Access Memories (RAMs) |
01/05/2000 | DE19909808A1 Circuit for verifying ROM data enables high speed checking of whether data has been correctly written into one or more ROMs |
01/05/2000 | DE19853069A1 Halbleiterprüfungsgerät Semiconductor inspection equipment |
01/04/2000 | US6012157 System for verifying the effectiveness of a RAM BIST controller's ability to detect faults in a RAM memory using states indicating by fault severity information |
01/04/2000 | US6012119 Storage system |
01/04/2000 | US6011748 Method and apparatus for built-in self test of integrated circuits providing for separate row and column addresses |
01/04/2000 | US6011742 Shared pull-up and selection circuitry for programmable cells such as antifuse cells |
01/04/2000 | US6011736 Device and method for testing a circuit |
01/04/2000 | US6011735 Synchronous semiconductor memory device with redundancy determination unit that can set replacement of redundant memory array provided in row and column directions |
01/04/2000 | US6011734 Fuseless memory repair system and method of operation |
01/04/2000 | US6011733 Adaptive addressable circuit redundancy method and apparatus |
01/04/2000 | US6011731 Cell plate regulator |
01/04/2000 | US6011720 Nonvolatile memory with reduced write time/write verify time and semiconductor device thereof |
12/29/1999 | WO1999067791A1 Electronic test memory device |
12/29/1999 | EP0966743A1 Integrated circuit with a memory and a control circuit |
12/29/1999 | CN1240042A Trimming circuit |
12/28/1999 | US6009541 Apparatus for performing an extensive diagnostic test in conjunction with a bios test routine |
12/28/1999 | US6009536 Method for using fuse identification codes for masking bad bits on memory modules |
12/28/1999 | US6009029 Circuit and method for antifuse stress test |
12/28/1999 | US6009028 Failure self-diagnosis device for semiconductor memory |
12/28/1999 | US6009027 Test method and circuit for semiconductor memory |
12/28/1999 | US6009026 Compressed input/output test mode |
12/28/1999 | US6009025 Partial replacement of partially defective memory devices |
12/28/1999 | US6009012 Microcontroller having a non-volatile memory and a method for selecting an operational mode |
12/28/1999 | US6008523 Electrical fuses with tight pitches and method of fabrication in semiconductors |
12/23/1999 | WO1999066409A1 Verification of compatibility between modules |
12/22/1999 | EP0965995A2 Circuit and method for automatic detection and correction of short circuits between wordlines and bitlines |
12/22/1999 | EP0965993A2 Memory with reduced wire connections |
12/22/1999 | EP0965083A1 Memory with redundancy circuit |
12/22/1999 | EP0862761B1 Data error detection and correction for a shared sram |
12/22/1999 | CN1239326A Memory with reduced wire connections |
12/22/1999 | CN1239307A Anti-fuse for programming redundancy cell, repair circuit having programming apparatus, and fabrication method of anti-fuse |
12/21/1999 | US6006350 Semiconductor device testing apparatus and method for testing memory and logic sections of a semiconductor device |
12/21/1999 | US6006347 Test mode features for synchronous pipelined memories |
12/21/1999 | US6006345 Pattern generator for memory burn-in and test |
12/21/1999 | US6006313 Semiconductor memory device that allows for reconfiguration around defective zones in a memory array |
12/21/1999 | US6006311 Dynamic updating of repair mask used for cache defect avoidance |
12/21/1999 | US6006307 Computer system employing a mirrored memory system for providing prefetch bandwidth |
12/21/1999 | US6005826 Address signal transition detecting circuit for semiconductor memory device |
12/21/1999 | US6005823 Memory device with pipelined column address path |
12/21/1999 | US6005815 Semiconductor memory |
12/21/1999 | US6005814 Test mode entrance through clocked addresses |
12/21/1999 | US6005813 Device and method for repairing a semiconductor memory |
12/21/1999 | US6005812 Device and method for supplying current to a semiconductor memory to support a boosted voltage within the memory during testing |
12/21/1999 | US6005373 System with anticipatory power supply load signal |
12/16/1999 | WO1999065037A1 On-chip circuit and method for testing memory devices |
12/16/1999 | DE19926663A1 Testing field programmable gate array with multi-programmable intermediate connections |
12/14/1999 | US6003149 Test method and apparatus for writing a memory array with a reduced number of cycles |
12/14/1999 | US6003148 Semiconductor memory device allowing repair of a defective memory cell with a redundant circuit in a multibit test mode |
12/14/1999 | US6003141 Single chip processor with externally executed test function |
12/14/1999 | US6002846 Printing apparatus and method for protecting information in printing apparatus |
12/14/1999 | US6002622 Device and method for margin testing a semiconductor memory by applying a stressing voltage simultaneously to complementary and true digit lines |
12/14/1999 | US6002621 Semiconductor memory device |
12/14/1999 | US6002620 Method and apparatus of column redundancy for non-volatile analog and multilevel memory |
12/14/1999 | US6002609 Semiconductor device having a security circuit for preventing illegal access |
12/14/1999 | US6002261 Trimming circuit |
12/14/1999 | US6001199 Method for manufacturing a fabric light control window covering |
12/14/1999 | US6000843 Electrically alterable nonvolatile semiconductor memory |
12/09/1999 | DE19922253A1 Coding system for redundant data |
12/09/1999 | DE19823687A1 Fuselatch-Schaltung Fuselatch circuit |
12/08/1999 | EP0962940A1 Method and apparatus capable of trimming a nonvolatile semiconductor storage device without any superfluous pads or terminals |
12/08/1999 | EP0961936A1 Semiconductor tester with data serializer |
12/08/1999 | CN1237769A Semiconductor memory device and method of burn-in testing |
12/07/1999 | US6000047 Scanning memory device and error correction method |
12/07/1999 | US6000039 Data reconstruction method and system wherein timing of data reconstruction is controlled in accordance with conditions when a failure occurs |
12/07/1999 | US5999480 Dynamic random-access memory having a hierarchical data path |
12/07/1999 | US5999468 Method and system for identifying a memory module configuration |
12/07/1999 | US5999467 Method and apparatus for stress testing a semiconductor memory |
12/07/1999 | US5999466 Method, apparatus and system for voltage screening of integrated circuits |
12/07/1999 | US5999465 Method and apparatus for determining the robustness of memory cells to alpha-particle/cosmic ray induced soft errors |
12/07/1999 | US5999464 Semiconductor memory device and method of checking same for defect |
12/07/1999 | US5999463 Redundancy fuse box and semiconductor device including column redundancy fuse box shared by a plurality of memory blocks |
12/07/1999 | US5999457 Semiconductor integrated circuit |
12/07/1999 | US5999450 Electrically erasable and programmable non-volatile memory device with testable redundancy circuits |
12/07/1999 | US5999446 Multi-state flash EEprom system with selective multi-sector erase |
12/07/1999 | US5999039 Active power supply filter |
12/07/1999 | US5999038 Fuse circuit having zero power draw for partially blown condition |
12/07/1999 | US5999037 Circuit for operating a control transistor from a fusible link |
12/02/1999 | WO1999046675A3 State copying method for software update |
12/02/1999 | DE19919157A1 Defect analysis apparatus for the inspection of an integrated circuit (IC) such as a dynamic random access memory (DRAM) |
12/02/1999 | DE19908513A1 Semiconductor memory device with parallel bit test mode |
12/02/1999 | DE19823943A1 Circuit arrangement for burn in system for testing chips using board |
12/01/1999 | EP0961291A1 Fuse latch circuit |
12/01/1999 | EP0961290A2 Flash memory with improved erasability and its circuitry |
12/01/1999 | EP0961289A2 Flash memory with improved erasability and its circuitry |
12/01/1999 | EP0960422A1 Method for minimizing the access time for semiconductor memories |
12/01/1999 | EP0704854B1 Memory device having error detection and correction function, and methods for writing and erasing the memory device |
12/01/1999 | EP0508441B1 Recording device |
12/01/1999 | CN1236967A Fuse latch circuit |
11/30/1999 | US5996108 Memory system |
11/30/1999 | US5996106 Multi bank test mode for memory devices |
11/30/1999 | US5996102 Assembly and method for testing integrated circuit devices |
11/30/1999 | US5996098 Memory tester |
11/30/1999 | US5996097 Testing logic associated with numerous memory cells in the word or bit dimension in parallel |
11/30/1999 | US5996096 Dynamic redundancy for random access memory assemblies |
11/30/1999 | US5996091 CPLD serial programming with extra read register |
11/30/1999 | US5996089 Loosely coupled mass storage computer cluster |