Patents
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
11/2000
11/07/2000US6145055 Cache memory having flags for inhibiting rewrite of replacement algorithm area corresponding to fault cell and information processing system having such a cache memory
11/07/2000US6145051 Moving sectors within a block of information in a flash memory mass storage architecture
11/07/2000US6144599 Semiconductor memory device
11/07/2000US6144598 Method and apparatus for efficiently testing rambus memory devices
11/07/2000US6144597 Memory device having a self-test function using sense amplifiers and a method for controlling a data writing operation in a test mode of the memory device
11/07/2000US6144596 Semiconductor memory test apparatus
11/07/2000US6144595 Semiconductor device performing test operation under proper conditions
11/07/2000US6144594 Test mode activation and data override
11/07/2000US6144593 Circuit and method for a multiplexed redundancy scheme in a memory device
11/07/2000US6144592 Semiconductor memory device having a redundant memory
11/07/2000US6144591 Redundancy selection circuit for semiconductor memories
11/07/2000US6144577 Semiconductor memory device having multibit data bus and redundant circuit configuration with reduced chip area
11/07/2000US6144247 Anti-fuse programming circuit using variable voltage generator
11/02/2000EP1049104A1 Technique for testing bitline and related circuitry of a memory array
11/02/2000EP1049103A1 Techniue for testing wordline and related circuitry of a memory array
11/02/2000EP1049017A1 Semiconductor memory device with redundancy
11/02/2000DE19919360A1 Integrated memory device
11/02/2000DE19917589C1 Halbleiterspeicher vom wahlfreien Zugriffstyp Semiconductor memory of the random access type
11/02/2000DE19917588A1 Halbleiterspeicheranordnung mit BIST A semiconductor memory device with BIST
11/02/2000DE19917336A1 Circuit arrangement of burn-in test of semiconductor module
11/02/2000DE10020554A1 Semiconductor memory component with column selection circuit for selecting one of memory banks from memory block and for selecting specific bit line from selected bank, for use in e.g. Rambus DRAM
11/01/2000CN1271942A Integrated memory possessing bit line, word line and plate line and its working method
10/2000
10/31/2000US6141789 Technique for detecting memory part failures and single, double, and triple bit errors
10/31/2000US6141779 Method for automatically programming a redundancy map for a redundant circuit
10/31/2000US6141768 Self-corrective memory system and method
10/31/2000US6141767 Method of and apparatus for verifying reliability of contents within the configuration ROM of IEEE 1394-1995 devices
10/31/2000US6141288 Semiconductor memory device allowing change of refresh mode and address switching method therewith
10/31/2000US6141286 Embedded DRAM architecture with local data drivers and programmable number of data read and data write lines
10/31/2000US6141281 Technique for reducing element disable fuse pitch requirements in an integrated circuit device incorporating replaceable circuit elements
10/31/2000US6141278 Semiconductor memory device allowing fast successive selection of word lines in a test mode operation
10/31/2000US6141273 Circuit for setting width of input/output data in semiconductor memory device
10/31/2000US6141271 Circuits for testing memory devices having direct access test mode and methods for testing the same
10/31/2000US6141269 Semiconductor integrated circuit device using BiCMOS technology
10/31/2000US6141268 Column redundancy in semiconductor memories
10/31/2000US6141267 Defect management engine for semiconductor memories and memory systems
10/25/2000EP1046993A1 Semiconductor memory with Built-In Self Test
10/25/2000EP1046992A2 Semiconductor RAM with two level bus system
10/25/2000EP1046121A1 Automatic test process with non-volatile result table store
10/25/2000EP0597706B1 Solid state peripheral storage device
10/25/2000CN1271167A IC storage with fuse detection circuit and its method
10/24/2000US6138262 Memory address generator in convolutional interleaver/deinterleaver
10/24/2000US6138259 Semiconductor memory testing apparatus
10/24/2000US6138257 IC testing apparatus and method
10/24/2000US6138256 Intelligent binning for electrically repairable semiconductor chips
10/24/2000US6138255 Semiconductor integrated circuit device and method for monitoring its internal signal
10/24/2000US6138254 Method and apparatus for redundant location addressing using data compression
10/24/2000US6137745 Embedded memory control circuit for control of access operations to a memory module
10/24/2000US6137738 Method for in-system programming of serially configured EEPROMS using a JTAG interface of a field programmable gate array
10/24/2000US6137737 Method and circuit for rapidly equilibrating paired digit lines of a memory device during testing
10/24/2000US6137736 Semiconductor memory device
10/24/2000US6137735 Column redundancy circuit with reduced signal path delay
10/24/2000US6137734 Computer memory interface having a memory controller that automatically adjusts the timing of memory interface signals
10/24/2000US6137348 Semiconductor device for generating two or more different internal voltages
10/24/2000US6137157 Semiconductor memory array having shared column redundancy programming
10/24/2000US6137119 Apparatus for isolating a conductive region from a substrate during manufacture of an integrated circuit and connecting the conductive region to the substrate after manufacture
10/24/2000US6136652 Preventing dielectric thickening over a channel area of a split-gate transistor
10/19/2000WO2000062461A2 Interleavers and de-interleavers
10/19/2000WO2000062166A1 Programmable read-only memory and method for operating said read-only memory
10/19/2000DE19916065A1 Programmierbarer Festwertspeicher und Verfahren zum Betreiben des Festwertspeichers Programmable read-only memory and method for operating the read-only memory
10/18/2000EP1045397A2 Dynamic random access memory circuit having a testing system and method to determine the sensitivity of a sense amplifier
10/17/2000US6134681 Semiconductor memory device with spare memory cell
10/17/2000US6134677 Method and apparatus for testing memory devices and displaying results of such tests
10/17/2000US6134628 Method and computer-based system for rewriting a nonvolatile rewritable memory
10/17/2000US6134611 System for interface circuit to control multiplexer to transfer data to one of two internal devices and transferring data between internal devices without multiplexer
10/17/2000US6134179 Synchronous semiconductor memory device capable of high speed reading and writing
10/17/2000US6134177 Redundancy decoding circuit having automatic deselection
10/17/2000US6134176 Disabling a defective element in an integrated circuit device having redundant elements
10/17/2000US6134162 Voltage generator with first drive current in test mode and second drive current in normal operation
10/17/2000US6134161 Test circuit and test method for semiconductor memory
10/17/2000US6134160 Memory device architecture having global memory array repair capabilities
10/17/2000US6134159 Semiconductor memory and redundant circuit
10/17/2000US6134158 Semiconductor device having a plurality of redundancy input/output lines
10/17/2000US6134152 Device and method for supplying current to a semiconductor memory to support a boosted voltage within the memory during testing
10/17/2000US6134142 Redundancy method and a device for a non-volatile semiconductor memory
10/17/2000US6133778 Anti-fuse programming circuit with cross-coupled feedback loop
10/12/2000WO2000060606A1 Failure capture apparatus and method for automatic test equipment
10/12/2000DE19804596C2 Verfahren und Schaltungsanordnung zum Test von über Teiladreßdekoder adressierbaren Halbleiterspeichern Method and circuit for testing on Teiladreßdekoder addressable semiconductor memories
10/12/2000DE10015370A1 Halbleiterspeicherbauelement mit aktivierbaren und deaktivierbaren Wortleitungen Semiconductor memory device with and deactuable word lines
10/11/2000EP1043730A1 Multi-functional memory
10/11/2000EP0617429B1 Semiconductor memory device having test circuit
10/11/2000CN1269582A Redundant circuit of semicnductor memory
10/10/2000US6131177 System including a ferroelectric memory
10/10/2000US6131172 Method for classifying electronic devices
10/10/2000US6130851 Semiconductor memory having a redundancy fuse broken by an electric current
10/10/2000US6130842 Adjustable verify and program voltages in programmable devices
10/10/2000US6130837 Storage device employing a flash memory
10/10/2000US6130576 Thin film transistor redundancy structure
10/10/2000US6130442 Memory chip containing a non-volatile memory register for permanently storing information about the quality of the device and test method therefor
10/05/2000WO2000058972A1 Method of operating an integrated memory with writable memory cells and corresponding integrated memory
10/05/2000DE19911939A1 Vorrichtung und Verfahren für den eingebauten Selbsttest einer elektronischen Schaltung Device and method for the built-in self test of an electronic circuit
10/04/2000EP1040420A1 Process for repairing integrated circuits
10/04/2000EP1040358A2 A memory test system with a means for test sequence optimisation and a method of its operation
10/03/2000US6128756 System for optimizing the testing and repair time of a defective integrated circuit
10/03/2000US6128696 Synchronous memory device utilizing request protocol and method of operation of same
10/03/2000US6128695 Identification and verification of a sector within a block of mass storage flash memory
10/03/2000US6128241 Repair circuit of semiconductor memory device using anti-fuse
10/03/2000US6128240 Cancellation of redundant elements with a cancel bank
10/03/2000US6128234 Redundant decision circuit for semiconductor memory device
10/03/2000US6128217 Semiconductor memory device
10/03/2000US6127880 Active power supply filter