Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
12/2000
12/21/2000CA2365956A1 Method and apparatus for testing a video display chip
12/20/2000EP1061528A1 Memory testing
12/20/2000EP1061527A1 On chip programmable data pattern generator for semiconductor memories
12/20/2000EP1061526A1 On chip data comparator with variable data and compare result compression
12/20/2000EP1061448A1 Semiconductor memory device with built-in self test and built-in self repair
12/20/2000EP1060512A1 Vertically integrated circuit system
12/20/2000EP1060027A2 Circuit and method for specifying performance parameters in integrated circuits
12/19/2000US6163875 Semiconductor testing equipment
12/19/2000US6163863 Method and circuit for compressing test data in a memory device
12/19/2000US6163862 On-chip test circuit for evaluating an on-chip signal using an external test signal
12/19/2000US6163860 Layout for a semiconductor memory device having redundant elements
12/19/2000US6163832 Semiconductor memory device including plural blocks with a pipeline operation for carrying out operations in predetermined order
12/19/2000US6163499 Programmable impedance output buffer drivers, semiconductor devices and static random access memories provided with a programmable impedance output port
12/19/2000US6163497 Semiconductor memory device
12/19/2000US6163495 Architecture, method(s) and circuitry for low power memories
12/19/2000US6163491 Synchronous semiconductor memory device which can be inspected even with low speed tester
12/19/2000US6163489 Semiconductor memory having multiple redundant columns with offset segmentation boundaries
12/14/2000WO2000075931A1 Method and integrated circuit for bit line soft programming (blisp)
12/13/2000EP1059584A2 Method and apparatus for generating test pattern for circuit blocks
12/13/2000CN1276534A Method and apparatus for producing test model of circuit block capable of reducing load and time
12/12/2000US6161204 Method and apparatus for testing SRAM memory cells
12/12/2000US6161195 EEPROM memory card device having defect relieving means
12/12/2000US6161194 Data reconstruction method and system wherein timing of data reconstruction is controlled in accordance with conditions when a failure occurs
12/12/2000US6161163 Method of writing, erasing, and controlling memory for memory device
12/12/2000US6161117 Waveform generation device and method
12/12/2000US6160745 Semiconductor storage device
12/12/2000US6160411 Apparatus for testing an integrated circuit in an oven during burn-in
12/12/2000US6160276 Double-sided programmable interconnect structure
12/12/2000CA2188101C Semiconductor memory device having small chip size and redundancy access time
12/07/2000WO2000073905A2 Test interface for electronic circuits
12/07/2000DE19924244A1 Integrated memory with redundant units which can be tested
12/07/2000DE19924153A1 Integrated semiconductor memory for integrated circuit
12/07/2000DE19922786A1 Semiconductor memory testing method
12/07/2000DE19729579C2 Verfahren zum Aktivieren einer redundanten Wortleitung bei Inter-Segment-Redundanz bei einem Halbleiterspeicher mit in Segmenten organisierten Wortleitungen A method for activating a redundant word line at Inter-segment redundancy in a semiconductor memory organized in segments of word lines
12/06/2000EP1058267A2 Semiconductor memory
12/06/2000EP1058192A2 EEPROM with redundancy
12/06/2000EP0585435B1 Transparent testing of integrated circuits
12/06/2000CN1276085A Method for testing the bus terminals of writable-readable integrated electronic circuit
12/05/2000US6158040 Rotated data-aligmnent in wade embedded DRAM for page-mode column ECC in a DVD controller
12/05/2000US6158037 Memory tester
12/05/2000US6158036 Merged memory and logic (MML) integrated circuits including built-in test circuits and methods
12/05/2000US6158035 Serial data input/output method and apparatus
12/05/2000US6158029 Method of testing an integrated circuit having a memory and a test circuit
12/05/2000US6158028 Semiconductor integrated circuit
12/05/2000US6158025 Apparatus and method for memory error detection
12/05/2000US6158016 Method for the processing of defective elements in a memory
12/05/2000US6157585 Redundancy circuit and method of ferroelectric memory device
12/05/2000US6157584 Redundancy circuit and method for semiconductor memory
12/05/2000US6157583 Integrated circuit memory having a fuse detect circuit and method therefor
12/05/2000US6157582 Dynamic pull-up suppressor for column redundancy write schemes with redundant data lines
11/2000
11/30/2000WO1996008822A3 Sense amplifier for non-volatile semiconductor memory
11/30/2000DE10017619A1 Semiconductor device testing device e.g. for LSI circuit, has restart address register which sets up restart address, based on which control sequence is restarted after stoppage
11/29/2000EP1055238A1 Circuit and method for testing a digital semi-conductor circuit
11/29/2000EP1055174A1 Method for storing and operating data units in a security module and associated security module
11/28/2000US6154867 Data-reproducing device
11/28/2000US6154862 Defect analysis memory for memory tester
11/28/2000US6154861 Method and apparatus for built-in self-test of smart memories
11/28/2000US6154860 High-speed test system for a memory device
11/28/2000US6154851 Memory repair
11/28/2000US6154416 Column address decoder for two bit prefetch of semiconductor memory device and decoding method thereof
11/28/2000US6154401 Circuit and method for memory device with defect current isolation
11/28/2000US6154399 Semiconductor storage device having redundancy circuit
11/28/2000US6154398 Low current redundancy anti-fuse method and apparatus
11/28/2000US6154389 Semiconductor memory device with a column redundancy occupying a less chip area
11/28/2000CA2216054C Semiconductor integrated circuit device for enabling easy confirmation of discrete information
11/23/2000WO2000070623A1 Memory circuit
11/23/2000WO2000070459A1 Error correction circuit and method for a memory device
11/23/2000WO2000070359A1 Integrated circuit and method for determining the current yield of a part of the integrated circuit
11/23/2000DE19922360A1 Programming circuit for electrically-programmable element
11/23/2000DE19921868A1 Redundant semiconductor memory circuit
11/22/2000EP1054326A1 Memory error correction using redundant sliced memory and standard ECC mechanisms
11/22/2000CN1274161A Semiconductor memory storage
11/22/2000CN1274159A Inner disk data comparator with variable data and comparable results compression function
11/21/2000US6151695 Test method of chips in a semiconductor wafer employing a test algorithm
11/21/2000US6151693 Automated method of burn-in and endurance testing for embedded EEPROM
11/21/2000US6151692 Integrated circuit having memory built-in self test (BIST) for different memory sizes and method of operation
11/21/2000US6151272 Integrated circuit memory devices that utilize data masking techniques to facilitate test mode analysis
11/21/2000US6151263 Integrated circuit memory devices having data input and output lines extending along the column direction
11/21/2000US6151259 Semiconductor memory device
11/21/2000US6151246 Multi-bit-per-cell flash EEPROM memory with refresh
11/21/2000US6150868 Anti-fuse programming circuit
11/21/2000US6150807 Integrated circuit architecture having an array of test cells providing full controllability for automatic circuit verification
11/21/2000US6150402 Natriuretic compounds
11/21/2000US6149316 Flash EEprom system
11/16/2000WO2000068794A1 Process for the secure writing of a pointer for a circular memory
11/16/2000DE19922920C1 Integrated memory device with redundant function e.g. dynamic random access memory (DRAM)
11/16/2000DE19921232A1 Verfahren zum gesicherten Schreiben eines Zeigers für einen Ringspeicher Method for the secure writing a pointer to a ring buffer
11/16/2000DE19913570A1 Betriebsverfahren für einen integrierten Speicher und integrierter Speicher A method of operating an integrated memory and built-in memory
11/16/2000DE19823943C2 Schaltungsanordnung für Burn-In-Systeme zum Testen von Bausteinen mittels eines Boards Circuit arrangement for burn-in systems for testing devices using a board
11/15/2000EP1052649A1 Response time measurement
11/15/2000EP1052648A1 Response time measurement
11/15/2000EP1052572A1 Non-volatile memory device with row redundancy
11/14/2000US6148430 Encoding apparatus for RAID-6 system and tape drives
11/14/2000US6148426 Apparatus and method for generating addresses in a SRAM built-in self test circuit using a single-direction counter
11/14/2000US6148424 Pattern generating apparatus
11/08/2000EP1050816A2 Microcomputer having built-in nonvolatile memory and check system thereof
11/08/2000EP1050053A2 Event phase modulator for integrated circuit tester
11/08/2000EP0835489B1 Method and system for using inverted data to detect corrupt data
11/08/2000CN1272696A Semiconductor storage device and method for fetch said device in test pattern
11/07/2000US6145092 Apparatus and method implementing repairs on a memory device
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