Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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02/08/2001 | DE10031528A1 Pattern generator for electric component inspection device, has sub-address unit which generates address of pattern information, during service interruption of main memory using sub-memory |
02/07/2001 | EP1074991A2 Semiconductor memory device |
02/07/2001 | EP1073906A2 Method and apparatus for protecting sensitive data during automatic testing of hardware |
02/07/2001 | EP0832520A4 Dedicated alu architecture for 10-bit reed-solomon error correction module |
02/06/2001 | US6185718 Memory card design with parity and ECC for non-parity and non-ECC systems |
02/06/2001 | US6185713 Method and apparatus for improving stuck-at fault detection in large scale integrated circuit testing |
02/06/2001 | US6185712 Chip performance optimization with self programmed built in self test |
02/06/2001 | US6185709 Device for indicating the fixability of a logic circuit |
02/06/2001 | US6185704 System signaling schemes for processor and memory module |
02/06/2001 | US6185703 Method and apparatus for direct access test of embedded memory |
02/06/2001 | US6185696 System for a primary BIOS ROM recovery in a dual BIOS ROM computer system |
02/06/2001 | US6185644 Memory system including a plurality of memory devices and a transceiver device |
02/06/2001 | US6185141 Semiconductor device allowing efficient evaluation of fast operation |
02/06/2001 | US6185138 Method and apparatus for testing random access memory devices |
02/06/2001 | US6185136 Method and apparatus for repairing defective columns of memory cells |
02/06/2001 | US6185134 Flash memory control method, flash memory system using the control method and flash memory device using the control method |
02/06/2001 | US6185130 Programmable current source |
02/01/2001 | WO2001008161A2 A method and a device for testing a memory array in which fault response is compresed |
02/01/2001 | WO2001007924A1 Built-in spare row and column replacement analysis system for embedded memories |
02/01/2001 | DE19504905C2 Speicherplattenvorrichtung Disk device |
01/31/2001 | EP1071994A1 Storage device with redundant storage cells and method for accessing redundant storage cells |
01/30/2001 | US6182262 Multi bank test mode for memory devices |
01/30/2001 | US6182257 BIST memory test system |
01/30/2001 | US6182254 Rambus ASIC having high speed testing function and testing method thereof |
01/30/2001 | US6182253 Method and system for automatic synchronous memory identification |
01/30/2001 | US6182184 Method of operating a memory device having a variable data input length |
01/30/2001 | US6181617 Method and apparatus for testing a semiconductor device |
01/30/2001 | US6181616 Circuits and systems for realigning data output by semiconductor testers to packet-based devices under test |
01/30/2001 | US6181614 Dynamic repair of redundant memory array |
01/30/2001 | US6181178 Systems and methods for correcting duty cycle deviations in clock and data signals |
01/30/2001 | US6181154 Method and apparatus for testing of dielectric defects in a packaged semiconductor memory device |
01/25/2001 | DE19944037C1 Integrated memory e.g. ferroelectric random access memory |
01/24/2001 | CN1281260A Semiconductor storage device possessing redundancy function |
01/23/2001 | US6178549 Memory writer with deflective memory-cell handling capability |
01/23/2001 | US6178532 On-chip circuit and method for testing memory devices |
01/23/2001 | US6178526 Testing memory modules with a PC motherboard attached to a memory-module handler by a solder-side adaptor board |
01/23/2001 | US6178127 Semiconductor memory device allowing reliable repairing of a defective column |
01/23/2001 | US6178126 Memory and system configuration for programming a redundancy address in an electric system |
01/23/2001 | US6178125 Semiconductor memory device preventing repeated use of spare memory cell and repairable by cell substitution up to two times |
01/23/2001 | US6178124 Integrated memory having a self-repair function |
01/18/2001 | DE19930169A1 Testeinrichtung zum Prüfen eines Speichers Test device for testing a memory |
01/18/2001 | DE10021347A1 Semiconductor memory component, uses comparator during test mode to combine data read from memory cells for output at selected output terminal |
01/17/2001 | EP1069504A2 Semiconductor memory device suitable for merging with logic |
01/17/2001 | EP1069503A2 Semiconductor memory device with an ECC circuit and method of testing the memory |
01/17/2001 | EP0910097B1 Integrated memory circuit including an internal high programming voltage generation circuit |
01/17/2001 | CN1280386A Equipment and method for screening test of fault leakage of storage device |
01/16/2001 | US6175938 Scheme for the reduction of extra standby current induced by process defects |
01/16/2001 | US6175937 Apparatus and method for programming multistate memory device |
01/16/2001 | US6175936 Apparatus for detecting faults in multiple computer memories |
01/16/2001 | US6175534 Synchronous semiconductor storage device |
01/16/2001 | US6175529 Semiconductor integrated circuit device and method for manufacturing the same |
01/16/2001 | US6175528 Redundancy circuit and repair method for semiconductor memory device by utilizing ferroelectric memory |
01/16/2001 | US6175527 Semiconductor memory device having reduced component count and lower wiring density |
01/16/2001 | US6175524 Merged memory and logic (MML) integrated circuit devices including buffer memory and methods of detecting errors therein |
01/16/2001 | US6175481 Semiconductor device having a deactivation fuse |
01/11/2001 | WO2001003139A1 Testing rambus memories |
01/11/2001 | WO2001002959A1 A system and method for improving multi-bit error protection in computer memory systems |
01/11/2001 | DE4236099C2 Redundanzspalten-Schaltkreis für eine Halbleiter-Speichervorrichtung Redundancy columns circuit for a semiconductor memory device |
01/11/2001 | DE10032122A1 Semiconducting memory component with redundancy circuit has temporary memory cells on data lines for replacing faulty cells in memory blocks in response to faulty cell addresses |
01/11/2001 | DE10029240A1 Semiconducting memory has redundancy assessment circuit, control circuit that activates redundancy decoder, deactivates normal word decoder if external address corresp. to faulty cell |
01/11/2001 | DE10024640A1 Delay-signal generation device for semiconductor device testing apparatus, chooses a suitable signal from phase shifter, which is phase shifted by predefined amount from reference, and outputs it as delay signal |
01/10/2001 | CN1279482A 快闪存储器 Flash memory |
01/09/2001 | US6173425 Methods of testing integrated circuits to include data traversal path identification information and related status information in test data streams |
01/09/2001 | US6173357 External apparatus for combining partially defected synchronous dynamic random access memories |
01/09/2001 | US6173345 Method and apparatus for levelizing transfer delays for a channel of devices such as memory devices in a memory subsystem |
01/09/2001 | US6173238 Memory testing apparatus |
01/09/2001 | US6172934 Semiconductor memory device preventing a malfunction caused by a defective main word line |
01/09/2001 | US6172929 Integrated circuit having aligned fuses and methods for forming and programming the fuses |
01/09/2001 | US6172921 Column redundancy circuit for semiconductor memory |
01/09/2001 | US6172916 Semiconductor memory device having a large band width and allowing efficient execution of redundant repair |
01/09/2001 | US6172911 Non-volatile semiconductor memory device with an improved verify voltage generator |
01/09/2001 | US6172910 Test cell for analyzing a property of the flash EEPROM cell and method of analyzing a property of the flash EEPROM cell using the same |
01/09/2001 | US6172906 Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices |
01/04/2001 | WO2001001422A1 Built-in self test schemes and testing algorithms for random access memories |
01/04/2001 | WO2001001421A1 Test device for testing a memory |
01/04/2001 | WO2001001161A1 Ferroelectric film property measuring device, measuring method therefor and measuring method for semiconductor memory units |
01/04/2001 | DE19904375C2 Verfahren zur Funktionsüberprüfung von Speicherzellen eines integrierten Halbleiterspeichers Method for functional testing of memory cells of an integrated semiconductor memory, |
01/03/2001 | EP1065594A2 Error detection and correction circuit in a flash memory |
01/03/2001 | CN1278647A Semiconductor device with test circuit capable of inhibiting enlargement of circuit scale and test apparatus for semiconductor device |
01/02/2001 | US6170070 Test method of cache memory of multiprocessor system |
01/02/2001 | US6169696 Method and apparatus for stress testing a semiconductor memory |
01/02/2001 | US6169695 Method and apparatus for rapidly testing memory devices |
12/27/2000 | EP1062573A2 State copying method for software update |
12/27/2000 | CN1278356A Object reconstruction on object oriented data storage device |
12/26/2000 | US6167544 Method and apparatus for testing dynamic random access memory |
12/26/2000 | US6167543 Memory test mode circuit |
12/26/2000 | US6167541 Method for detecting or preparing intercell defects in more than one array of a memory device |
12/26/2000 | US6167540 Semiconductor memory device and redundant address selection method therefor |
12/26/2000 | US6167530 Digital audio data accumulation device |
12/26/2000 | US6167483 Block erase type nonvolatile semiconductor memory device |
12/26/2000 | US6167481 Address generating circuit for data compression |
12/26/2000 | US6166981 Method for addressing electrical fuses |
12/26/2000 | US6166975 Dynamic random access memory |
12/26/2000 | US6166973 Memory device with multiple-bit data pre-fetch function |
12/26/2000 | US6166972 Semiconductor memory device and defect repair method for semiconductor memory device |
12/26/2000 | US6166967 Multi-bank testing apparatus for a synchronous DRAM |
12/26/2000 | US6166960 Method, system and apparatus for determining that a programming voltage level is sufficient for reliably programming an eeprom |
12/26/2000 | US6166942 Embedded DRAM architecture with local data drivers and programmable number of data read and data write lines |
12/26/2000 | US6166559 Redundancy circuitry for logic circuits |
12/21/2000 | WO2000077529A2 Method and apparatus for testing a video display chip |