Patents
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
10/2001
10/17/2001CN1317797A Self-detecting of magnetic-resistance memory array
10/16/2001US6304989 Built-in spare row and column replacement analysis system for embedded memories
10/16/2001US6304948 Method and apparatus for erasing data after expiration
10/16/2001US6304937 Method of operation of a memory controller
10/16/2001US6304509 Semiconductor storage unit
10/16/2001US6304504 Methods and systems for alternate bitline stress testing
10/16/2001US6304503 Semiconductor memory device
10/16/2001US6304502 Semiconductor memory device connected to memory controller and memory system employing the same
10/16/2001US6304501 Semiconductor memory device having a large band width and allowing efficient execution of redundant repair
10/16/2001US6304500 Integrated circuit memory devices having data input and output lines extending in the column direction, and circuits and methods for repairing faulty cells
10/16/2001US6304499 Integrated dynamic semiconductor memory having redundant units of memory cells, and a method of self-repair
10/16/2001US6304498 Semiconductor memory device capable of suppressing degradation in operation speed after replacement with redundant memory cell
10/16/2001US6304492 Synchronous semiconductor memory device and method for reading data
10/16/2001US6304485 Flash EEprom system
10/16/2001US6304069 Low power consumption multiple power supply semiconductor device and signal level converting method thereof
10/16/2001US6303970 Semiconductor device with a plurality of fuses
10/11/2001US20010029592 Memory sub-system error cleansing
10/11/2001US20010029564 Identification and verification of a sector within a block of mass storage flash memory
10/11/2001US20010028588 Semiconductor memory
10/11/2001US20010028584 Semiconductor memory device having replacing defective columns with redundant columns
10/11/2001US20010028583 Semiconductor memory device having data parallel/serial conversion function and capable of efficiently performing operational test
10/11/2001US20010028580 Device and method for supplying current to a semiconductor memory to support a boosted voltage within the memory during testing
10/11/2001US20010028523 Data storage device and method for controlling the device
10/11/2001DE10115572A1 Semiconductor test system with a facility for error data storage in compressed form
10/11/2001DE10016719A1 Integrierter Speicher und Verfahren zur Funktionsprüfung von Speicherzellen eines integrierten Speichers Integrated memory and method for functional testing of memory cells of an integrated memory
10/10/2001EP1143457A2 Semiconductor memory device and testing system and testing method
10/10/2001EP1143456A2 Integrated memory and method for verifying the function of memory cells of an integrated memory
10/10/2001EP1143256A2 Test device for the functional testing of a semiconductor chip
10/10/2001EP1141835A1 Integrated memory with redundancy
10/10/2001EP1141834A1 Ic memory having a redundancy
10/10/2001EP1141736A1 Pattern generator for a packet-based memory tester
10/10/2001EP0819276B1 Memory management
10/10/2001CN1316772A Delay time insertion based on event testing system
10/09/2001US6301678 Test circuit for reducing test time in semiconductor memory device having multiple data input/output terminals
10/09/2001US6301675 Method for synchronizing reserved areas in a redundant storage array
10/09/2001US6301670 Method and apparatus for erasing data when a problem is identified
10/09/2001US6301190 Semiconductor memory device with a rapid packet data input, capable of operation check with low speed tester
10/09/2001US6301182 Semiconductor memory device
10/09/2001US6301172 Gate voltage testkey for isolation transistor
10/09/2001US6301171 Semiconductor memory device capable of reducing data test time in pipeline
10/09/2001US6301170 MRAD test circuit, semiconductor memory device having the same and MRAD test method
10/09/2001US6301169 Semiconductor memory device with IO compression test mode
10/09/2001US6301168 CMOS cell and circuit design for improved IDDQ testing
10/09/2001US6301167 Apparatus for testing semiconductor memory
10/09/2001US6301166 Parallel tester capable of high speed plural parallel test
10/09/2001US6301165 Apparatus and method for detecting faulty of cells in a semiconductor memory device
10/09/2001US6301164 Antifuse method to repair columns in a prefetched output memory architecture
10/09/2001US6301163 Semiconductor memory device and method of checking same for defect
10/09/2001US6301157 Method and circuit for testing memory cells in a multilevel memory device
10/09/2001US6301154 Semiconductor memory device having floating gate type transistors programmed to have differing threshold voltages
10/09/2001US6301152 Non-volatile memory device with row redundancy
10/09/2001US6301150 Semiconductor device, data processing system and a method for changing threshold of a non-volatile memory cell
10/09/2001US6301144 Semiconductor memory device
10/04/2001US20010027546 Semiconductor integrated circuit
10/04/2001US20010027545 Circuit and method, for storing data prior to and after determining failure
10/04/2001US20010027541 Method for testing the refresh device of an information memory
10/04/2001US20010027516 Squence control circuit
10/04/2001US20010026967 Semiconductor memory device
10/04/2001US20010026949 Semiconductor device manufacturing system and method of manufacturing semiconductor devices
10/04/2001US20010026496 Semiconductor memory device allowing increase in capacity and operation speed with a suppressed layout area
10/04/2001US20010026492 Semiconductor memory device with a refresh function
10/04/2001US20010026490 Sense amplifier
10/04/2001US20010026486 Semiconductor memory production system and semiconductor memory production method
10/04/2001US20010026483 Semiconductor memory device
10/04/2001US20010026481 Method and apparatus for repairing defective columns of memory cells
10/04/2001US20010026478 Semiconductor memory device
10/04/2001US20010026477 Integrated circuit having an on-board reference generator
10/04/2001US20010026476 Redundancy architecture for an interleaved memory
10/04/2001US20010026472 Flash EEprom system
10/04/2001EP1139414A2 Method for failure analysis during the manufacturing semiconductor devices
10/04/2001EP1139279A2 Card-type recording medium and card-type recording medium reader
10/04/2001DE10014388A1 Conducting memory device burn-in process enabling electrical characteristics of memory device to be stabilised - involves applying reference potential, second voltage to voltage connections, varying control voltage between reference potential and operating voltage
10/03/2001CN1315732A Automatic test method and circuit for RAM
10/02/2001US6298465 Skew calibration means and a method of skew calibration
10/02/2001US6298429 Memory address generator capable of row-major and column-major sweeps
10/02/2001US6298001 Semiconductor memory device enabling direct current voltage test in package status
10/02/2001US6297999 Semiconductor memory device and method for setting stress voltage
10/02/2001US6297997 Semiconductor device capable of reducing cost of analysis for finding replacement address in memory array
10/02/2001US6297996 Test mode activation and data override
10/02/2001US6297995 Circuit configuration with a temperature-dependent semiconductor component test and repair logic circuit
10/02/2001CA2019310C Non-volatile ram bit cell
09/2001
09/27/2001WO2001071726A2 Method and apparatus for improving the testing, yield and performance of very large scale integrated circuits
09/27/2001WO2001071725A1 Method and device for processing error addresses
09/27/2001US20010025360 Disk array system and its control method
09/27/2001US20010025354 Method and apparatus for testing an SDRAM memory used as the main memory in a personal computer
09/27/2001US20010024392 Method of testing a memory cell having a floating gate
09/27/2001US20010024390 Semiconductor memory device and method of testing the same
09/27/2001US20010024386 Flash EEprom system
09/27/2001US20010024384 Semiconductor memory device capable of reliably performing burn-in test at wafer level
09/27/2001DE10012104A1 Redundant multiplexer for semiconductor memory configuration, receives control and switching signals for determining whether switches are set correctly based on several fault bit lines
09/27/2001DE10011180A1 Digital circuit e.g. for FeRAM
09/26/2001EP1137013A2 Semiconductor memory production system and method
09/26/2001EP1136833A1 Method of performing a burn-in process to electrically stress a semiconductor memory
09/26/2001EP0912939B1 Flash memory card
09/26/2001EP0842516B1 Method and apparatus for performing memory cell verification on a nonvolatile memory circuit
09/26/2001EP0809849B1 On-chip memory redundancy circuitry for programmable non-volatile memories, and methods for programming same
09/26/2001CN2450783Y Assembly structure of internal storage chip
09/26/2001CN1314702A Producing system of semiconductor storage and method for producing semiconductor storage
09/25/2001US6295620 Memory test facilitation circuit using stored test data repeatedly
09/25/2001US6295619 Method and apparatus for error management in a solid state disk drive