Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
11/2001
11/08/2001US20010037864 Fabric light control window covering
11/08/2001DE10118139A1 Semiconductor test system, has electronic pin cards each provided with calibration pin units which serve as test devices which are applied with sample or strobe signal based on stored event data
11/08/2001DE10101901A1 Halbleiter-Speichervorrichtung The semiconductor memory device
11/07/2001EP1152339A2 Semiconductor memory device and restoration method therefor
11/07/2001EP1152338A2 Method and apparatus for downloading firmware
11/07/2001EP1151384A1 Storage system comprising means managing a storage unit with anti-wear and anti-wear management of a storage unit
11/07/2001EP0600151B1 Nonvolatile semiconductor memory device having electrically and collectively erasable characteristics
11/07/2001CN1321320A Method of testing memory
11/07/2001CN1320950A Semiconductor device producing system and method
11/07/2001CN1320823A Data failure storage compression of semiconductor testing system
11/06/2001US6314537 Command generator having single-input to multi-output converter
11/06/2001US6314536 Memory testing apparatus
11/06/2001US6314527 Recovery of useful areas of partially defective synchronous memory components
11/06/2001US6314051 Memory device having write latency
11/06/2001US6314037 Semiconductor integrated circuit device using BiCMOS technology
11/06/2001US6314036 Method and apparatus for efficiently testing RAMBUS memory devices
11/06/2001US6314035 Semiconductor memory device capable of manifesting a short-circuit failure associated with column select line
11/06/2001US6314034 Application specific event based semiconductor memory test system
11/06/2001US6314033 Semiconductor memory device with redundancy circuit
11/06/2001US6314032 Semiconductor device with flexible redundancy system
11/06/2001US6314031 Memory device
11/06/2001US6314030 Semiconductor memory having segmented row repair
11/06/2001US6314024 Data processing apparatus
11/06/2001US6314018 Integrated memory with at least two plate segments
11/06/2001US6313655 Semiconductor component and method for testing and operating a semiconductor component
11/01/2001WO2001082053A2 A low latency fifo circuit for mixed clock systems
11/01/2001US20010037478 Repair circuit using antifuse
11/01/2001US20010036114 Semiconductor memory device having faulty cells
11/01/2001US20010035537 Semiconductor integrated circuit
11/01/2001US20010035536 Integrated semiconductor circuit, in particular a semiconductor memory configuration, and method for its operation
11/01/2001US20010035525 Semiconductor device having a test pattern same as conductive pattern to be tested and method for testing semiconductor device for short-circuit
11/01/2001CA2407407A1 A low latency fifo circuit for mixed clock systems
10/2001
10/31/2001EP1150211A2 Redundant memory cell for dynamic random access memories having twisted bit line architectures
10/31/2001EP1149384A1 Method for functionally testing memory cells of an integrated semiconductor memory
10/31/2001EP0654168B1 Fault-tolerant hierarchical bus system
10/31/2001CN1319847A Integrated memory with storage and reference unit
10/30/2001US6311300 Semiconductor testing apparatus for testing semiconductor device including built in self test circuit
10/30/2001US6311299 Data compression circuit and method for testing embedded memory devices
10/30/2001US6311298 Mechanism to simplify built-in self test of a control store unit
10/30/2001US6310826 Semiconductor device having a test circuit
10/30/2001US6310812 Integrated memory having memory cells and reference cells
10/30/2001US6310807 Semiconductor integrated circuit device including tester circuit for defective memory cell replacement
10/30/2001US6310806 Semiconductor memory device with redundant circuit
10/30/2001US6310805 Architecture for a dual-bank page mode memory with redundancy
10/30/2001US6310804 Device and method for repairing a semiconductor memory
10/30/2001US6310803 Semiconductor having mechanism capable of operating at high speed
10/30/2001US6310802 Method and apparatus for reducing bleed currents within a DRAM array having row-to-column shorts
10/30/2001US6310801 Method and device for fast addressing redundant columns in a nonvolatile memory
10/30/2001US6310485 Integrated circuit device having a burn-in mode for which entry into and exit from can be controlled
10/25/2001US20010034865 Method and apparatus for testing semiconductor devices using an actual board-type product
10/25/2001US20010034864 Memory LSI failure analysis apparatus and analysis method thereof
10/25/2001US20010033522 Semiconductor memory
10/25/2001US20010033520 Device and method for repairing a memory array by storing each bit in multiple memory cells in the array
10/25/2001US20010033519 Semiconductor memory device
10/25/2001US20010033518 Method for carrying out a burn-in process for electrically stressing a semiconductor memory
10/25/2001US20010033195 Semiconductor integrated circuit
10/25/2001US20010033181 Method and apparatus for testing semiconductor devices using the back side of a circuit board
10/25/2001DE10103614A1 Halbleiterspeicher Semiconductor memory
10/25/2001DE10029835C1 Integrated circuit with test facility has test switch closed by applied test signal to allow test voltage to be applied to irreversible programmable switches
10/24/2001EP1148510A2 Integrated semiconductor memory, especially semiconductor memory device and operating method thereof
10/24/2001EP0944094B1 Power switching circuit
10/24/2001EP0829086B1 Technique for reconfiguring a high density memory
10/24/2001CN1318844A Read amplifier
10/23/2001US6308290 Look ahead scan chain diagnostic method
10/23/2001US6308244 Information processing apparatus with improved multiple memory access and control
10/23/2001US6308121 Electronic control unit, in particular for a device provided in a motor vehicle
10/23/2001US6307806 Semiconductor integrated circuit and method of operating the same
10/23/2001US6307804 Semiconductor memory device capable of efficient memory cell select operation with reduced element count
10/23/2001US6307801 Trimming circuit for system integrated circuit
10/23/2001US6307796 Dynamic random access memory
10/23/2001US6307795 Semiconductor memory having multiple redundant columns with offset segmentation boundaries
10/23/2001US6307794 Semiconductor memory device and signal line shifting method
10/23/2001US6307787 Burst read incorporating output based redundancy
10/23/2001US6307778 Non volatile memory with detection of short circuits between word lines
10/23/2001US6307777 Nonvolatile semiconductor storage device
10/23/2001US6307776 Multi-bit-per-cell flash EEPROM memory with refresh
10/23/2001US6307772 Static type semiconductor memory device for lower current consumption
10/23/2001US6307769 Semiconductor devices having mirrored terminal arrangements, devices including same, and methods of testing such semiconductor devices
10/23/2001US6307423 Programmable circuit with preview function
10/23/2001US6306689 Anti-fuse for programming redundancy cell, repair circuit having programming apparatus, and fabrication method of anti-fuse
10/18/2001US20010032327 System and method of processing memory
10/18/2001US20010030904 Memory device having a programmable register
10/18/2001US20010030901 semiconductor integrated circuit device having fuses and fuse latch circuits
10/18/2001US20010030897 Redundancy mapping in a multichip semiconductor package
10/18/2001US20010030896 Semiconductor memory device capable of implementing redundancy-based repair efficiently in relation to layout and operating speed and semiconductor integrated circuit device having such semiconductor memory device
10/18/2001US20010030890 Storage device employing a flash memory
10/18/2001US20010030570 Antifuse circuit being programmable by using no connection pin
10/18/2001US20010030568 Integrated device with operativity testing
10/18/2001US20010030563 Method and circuitry for soft fuse row redundancy with simple fuse programming
10/18/2001US20010030553 Method and apparatus for inspecting semiconductor device
10/18/2001DE10118141A1 Semiconductor device test system has modular units connected via tester bus to main computer
10/18/2001DE10062081A1 Integrated circuit with device for simultaneously testing number of output signals, uses coincidence circuit to test whether number of output signals concur with one another
10/18/2001DE10018013A1 Integrierte Halbleiterschaltung, insbesondere Halbleiter-speicheranordnung und Verfahren zum Betrieb derselben A semiconductor integrated circuit, in particular semiconductor memory device and method of operating the same
10/17/2001EP1146515A1 High-speed error correcting apparatus with efficient data transfer
10/17/2001EP1018120B1 Digital storage and operating method for the same
10/17/2001EP0990236B1 Storage cell system and method for testing the function of storage cells
10/17/2001EP0751397B1 Test mode setting circuit of test circuit for semiconductor memory
10/17/2001EP0694840B1 Motor vehicle controller using electrically erasable and programmable memory
10/17/2001EP0578139B1 Programmable disk drive array controller
10/17/2001CN1317912A Error detecting/correcting circuit
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