| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 04/25/2002 | US20020049935 Circuit for modifying stored data |
| 04/25/2002 | US20020049931 Method of and apparatus for executing diagnostic testing of a ROM |
| 04/25/2002 | US20020048856 Method of testing a semiconductor memory device |
| 04/25/2002 | US20020048211 Semiconductor memory device with a rapid packet data input, capable of operation check with low speed tester |
| 04/25/2002 | US20020048206 Method and apparatus for reducing bleed currents within a dram array having row-to-column shorts |
| 04/25/2002 | US20020048205 Dynamic random access memory |
| 04/25/2002 | US20020048202 Method of managing a defect in a flash memory |
| 04/25/2002 | US20020048199 Device and method for repairing a semiconductor memory |
| 04/25/2002 | US20020048191 Semiconductor device and testing method thereof |
| 04/25/2002 | US20020048182 Memory circuit/logic circuit integrated device capable of reducing term of works |
| 04/25/2002 | US20020047181 Semiconductor integrated circuit device with electrically programmable fuse |
| 04/25/2002 | US20020047137 Semiconductor integrated circuit device having hierarchical test interface circuit |
| 04/25/2002 | DE10147910A1 Method for testing a memory device under test on a memory tester applies the same sequence of transmission vectors to a memory under test and to a main memory within the memory tester comparing sample test data for both. |
| 04/25/2002 | DE10147201A1 Semiconductor memory has sub word selecting circuit which switches selection of sub word selection line of memory cell array arranged on corresponding substrate plates using drivers |
| 04/25/2002 | DE10144645A1 Device for manipulating address information in a memory tester controls address channels in the memory tester with address registers storing logical address bits, replacement bits, a bit selector and a vector processor. |
| 04/25/2002 | DE10126878A1 Halbleitervorrichtung Semiconductor device |
| 04/25/2002 | DE10050771A1 Circuit for testing a data memory links a processing unit to a data memory to generate memory data from a piece of preset sample data written into the data memory for testing it. |
| 04/25/2002 | DE10050212A1 Method for testing a memory store with multiple memory banks each with an addressable memory area writes test data into the addressed memory areas of the memory banks. |
| 04/24/2002 | EP1199726A1 Method to test integrated circuits |
| 04/24/2002 | CN1346130A Non-volatile semiconductor memory |
| 04/24/2002 | CN1346090A Automatic insert method for semiconductor circuit and easifying circuit test |
| 04/23/2002 | US6378118 Semiconductor integrated circuit having a MPU and a DRAM cache memory |
| 04/23/2002 | US6378103 Apparatus and method for error correction in optical disk system |
| 04/23/2002 | US6378091 Test mode circuit capable of surely resetting test mode signals |
| 04/23/2002 | US6378020 System having double data transfer rate and intergrated circuit therefor |
| 04/23/2002 | US6377508 Dynamic semiconductor memory device having excellent charge retention characteristics |
| 04/23/2002 | US6377506 Semiconductor device |
| 04/23/2002 | US6377499 Refresh-free semiconductor memory device |
| 04/23/2002 | US6377498 Nonvolatile ferroelectric memory device with row redundancy circuit and method for relieving failed address thereof |
| 04/23/2002 | US6377493 Semiconductor apparatus |
| 04/18/2002 | WO2001063619A3 Method for efficient analysis of semiconductor failures |
| 04/18/2002 | US20020046385 Operating method for an integrated memory having writeable memory cells and corresponding integrated memory |
| 04/18/2002 | US20020046377 Method for built-in self test of an electronic circuit |
| 04/18/2002 | US20020046374 Method of testing memory device, method of manufacturing memory device, apparatus for testing memory device, method of testing memory module, method of manufacturing memory module, apparatus for testing memory module and method of manufacturing computer |
| 04/18/2002 | US20020046373 Memory testing apparatus |
| 04/18/2002 | US20020046361 Intelligent binning for electrically repairable semiconductor chips |
| 04/18/2002 | US20020046318 Flash eeprom system |
| 04/18/2002 | US20020046314 Synchronous memory device having automatic precharge |
| 04/18/2002 | US20020045297 Membrane 3D IC fabrication |
| 04/18/2002 | US20020044491 Memory testing |
| 04/18/2002 | US20020044489 Semiconductor memory device with redundancy logic cell and repair method |
| 04/18/2002 | US20020044476 Semiconductor devices having mirrored terminal arrangements, devices including same, and methods of testing such semiconductor devices |
| 04/18/2002 | US20020044474 Semiconductor test apparatus |
| 04/18/2002 | US20020044006 Fuse circuit for semiconductor integrated circuit |
| 04/18/2002 | DE10028145C2 Integrierte Schaltungsanordnung zum Testen von Transistoren und Halbleiterscheibe mit einer solchen Schaltungsanordnung An integrated circuit device for testing transistors and semiconductor wafer having a circuit arrangement |
| 04/17/2002 | EP1197969A1 Word line testability improvement |
| 04/17/2002 | EP1197864A2 Circuit for repairing defective bit in semiconductor memory device and repairing method |
| 04/17/2002 | EP1197830A2 Integrated circuit I/O using a high performance bus interface |
| 04/17/2002 | EP1197759A2 Semiconductor apparatus for providing reliable data analysis of signals |
| 04/17/2002 | EP1016089B1 Memory tester with data compression |
| 04/17/2002 | CN1345450A Method of operating integrated memory with writable memory cells and corresponding integrated memory |
| 04/17/2002 | CN1345068A Circuit device and method for accelerated ageing in magnetoresistance memory |
| 04/16/2002 | US6374381 Semiconductor memory device, and method of checking the semiconductor device and method of using the same |
| 04/16/2002 | US6374378 Failure analysis memory for semiconductor memory testing devices and its storage method |
| 04/16/2002 | US6374377 Low yield analysis of embedded memory |
| 04/16/2002 | US6374376 Circuit, system and method for arranging data output by semiconductor testers to packet-based devices under test |
| 04/16/2002 | US6374371 Method and apparatus for monitoring component latency drifts |
| 04/16/2002 | US6374370 Method and system for flexible control of BIST registers based upon on-chip events |
| 04/16/2002 | US6374199 Inspection and analyzing apparatus for semiconductor integrated circuit and inspection and analyzing method |
| 04/16/2002 | US6373784 Semiconductor memory device |
| 04/16/2002 | US6373776 Dynamic ram and semiconductor device |
| 04/16/2002 | US6373775 Semiconductor memory device with restrained scale of decoding circuit used in shift redundancy |
| 04/16/2002 | US6373774 Semiconductor memory device with bank configuration |
| 04/16/2002 | US6373772 Semiconductor integrated circuit device having fuses and fuse latch circuits |
| 04/16/2002 | US6373771 Integrated fuse latch and shift register for efficient programming and fuse readout |
| 04/16/2002 | US6373764 Semiconductor memory device allowing static-charge tolerance test between bit lines |
| 04/16/2002 | US6373761 Method and apparatus for multiple row activation in memory devices |
| 04/16/2002 | US6373760 Static type semiconductor memory device adopting a redundancy system |
| 04/16/2002 | US6373759 SRAM device |
| 04/16/2002 | US6373758 System and method of operating a programmable column fail counter for redundancy allocation |
| 04/16/2002 | US6373757 Integrated circuit memory devices having control circuits therein that provide column redundancy capability |
| 04/16/2002 | US6373747 Flash EEprom system |
| 04/16/2002 | US6373744 Ferroelectric memory |
| 04/16/2002 | US6372528 Burn-in method and burn-in device |
| 04/11/2002 | WO2002029825A2 Method to descramble the data mapping in memory circuits |
| 04/11/2002 | WO2002029824A2 System and method for testing integrated circuit devices |
| 04/11/2002 | WO2002028162A2 Penalty free address decoding scheme |
| 04/11/2002 | US20020042898 Test interface for verification of high speed embedded synchronous dynamic random access memory (SDRAM) circuitry |
| 04/11/2002 | US20020042897 Method and system for distributed testing of electronic devices |
| 04/11/2002 | US20020041533 Fuse circuit using anti-fuse and method for searching for failed address in semiconductor memory |
| 04/11/2002 | US20020041532 Semiconductor memory device having high data input/output frequency and capable of efficiently testing circuit associated with data input/output |
| 04/11/2002 | US20020041529 Semiconductor integrated circuit and operating method |
| 04/11/2002 | US20020041242 Semiconductor apparatus |
| 04/11/2002 | US20020041198 Area efficient redundancy multiplexer circuit technique for integrated circuit devices providing significantly reduced parasitic capacitance |
| 04/11/2002 | US20020040989 Semiconductor storage device and method of testing the same |
| 04/11/2002 | DE10132241A1 Verfahren und Vorrichtung zum Testen von Halbleiterbauelementen A method and apparatus for testing semiconductor devices |
| 04/11/2002 | CA2419939A1 System and method for testing integrated circuit devices |
| 04/10/2002 | EP1195772A1 Fuse circuit |
| 04/10/2002 | EP1195771A2 Differential voltage sense circuit to detect the state of a CMOS process compatible fuses at low supply voltages |
| 04/10/2002 | EP1194849A1 A system and method for improving multi-bit error protection in computer memory systems |
| 04/10/2002 | EP0954866B1 Sdram clocking test mode |
| 04/10/2002 | EP0668561B1 A flexible ECC/parity bit architecture |
| 04/10/2002 | CN1344416A Device and method for carrying out built-in self-test of electronic circuit |
| 04/09/2002 | US6370668 High speed memory system capable of selectively operating in non-chip-kill and chip-kill modes |
| 04/09/2002 | US6370661 Apparatus for testing memory in a microprocessor |
| 04/09/2002 | US6370658 Device for testing digital signal processor in digital video disc reproducing apparatus |
| 04/09/2002 | US6370612 Adaptive memory control |
| 04/09/2002 | US6370074 Redundant encoding for buried metal fuses |
| 04/09/2002 | US6370070 Methods for alternate bitline stress testing |
| 04/09/2002 | US6370069 Method for testing a multiplicity of word lines of a semiconductor memory configuration |