| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 04/09/2002 | US6370068 Semiconductor memory devices and methods for sampling data therefrom based on a relative position of a memory cell array section containing the data |
| 04/09/2002 | US6370067 Automatic configuration of delay parameters in a dynamic memory controller |
| 04/09/2002 | US6370061 Ceiling test mode to characterize the threshold voltage distribution of over programmed memory cells |
| 04/09/2002 | US6370054 Dynamic RAM and semiconductor device |
| 04/09/2002 | US6369406 Method for localizing point defects causing leakage currents in a non-volatile memory device |
| 04/04/2002 | WO2002027729A2 Writable tracking cells |
| 04/04/2002 | US20020040455 Semiconductor apparatus for providing reliable data analysys of signals |
| 04/04/2002 | US20020040454 Self-test ram using external synchronous clock |
| 04/04/2002 | US20020039800 Burn-in method and burn-in device |
| 04/04/2002 | US20020039799 Method for testing semiconductor memory devices, and apparatus and system for testing semiconductor memory devices |
| 04/04/2002 | US20020039318 Timing fuse method for delaying signals in a memory device |
| 04/04/2002 | US20020039315 Synchronous semiconductor memory device having improved operational frequency margin at data input/output |
| 04/04/2002 | US20020039312 Nonvolatile memory and method of writing data thereto |
| 04/04/2002 | US20020039311 Non-volatile semiconductor memory |
| 04/04/2002 | US20020038878 Semiconductor memory device having redundancy function |
| 04/04/2002 | DE10108044A1 Testing method for semiconductor memory device identifies defective memory addresses by comparing read out bit data with written-in bit data |
| 04/04/2002 | DE10043350A1 Process for studying structures on a wafer places circuits with test structures on the wafer light mask to detect electric parameters |
| 04/03/2002 | EP1193716A1 Error catch RAM for memory tester has SDRAM memory sets configurable for size and speed |
| 04/03/2002 | EP1193598A1 Integrated memory with magnetoresistive memory cells |
| 04/03/2002 | EP1193502A2 Apparatus and method for performing conditional calculations |
| 04/03/2002 | EP1192544A1 Error correction circuit and method for a memory device |
| 04/03/2002 | EP1192475A2 Method and apparatus for testing a video display chip |
| 04/03/2002 | EP1038223B1 Monitoring system for a digital trimming cell |
| 04/02/2002 | US6367044 Semiconductor integrated circuit device |
| 04/02/2002 | US6367039 Method and apparatus for testing adjustment of a circuit parameter |
| 04/02/2002 | US6367030 Address conversion circuit and address conversion system with redundancy decision circuitry |
| 04/02/2002 | US6366995 System and a method for defining transforms of memory device addresses |
| 04/02/2002 | US6366611 Circuit for controlling equalization pulse width |
| 04/02/2002 | US6366518 Circuit configuration for programming an electrically programmable element |
| 04/02/2002 | US6366515 Semiconductor memory device |
| 04/02/2002 | US6366511 Method for checking a semiconductor memory device |
| 04/02/2002 | US6366510 Electronic memory device |
| 04/02/2002 | US6366509 Method and apparatus for repairing defective columns of memory cells |
| 04/02/2002 | US6366508 Integrated circuit memory having column redundancy with no timing penalty |
| 04/02/2002 | US6366507 High speed semiconductor memory device with short word line switching time |
| 04/02/2002 | US6366503 Semiconductor storage device |
| 04/02/2002 | US6366118 Antifuse repair circuit |
| 04/02/2002 | US6366111 Test circuit for semiconductor IC device |
| 04/02/2002 | US6365931 Gate insulating structure for power devices, and related manufacturing process |
| 03/28/2002 | WO2002025957A2 Memory module and memory component built-in self test |
| 03/28/2002 | WO2002025666A2 Control apparatus for testing a random access memory |
| 03/28/2002 | WO2002025296A2 Method and system for wafer and device-level testing of an integrated circuit |
| 03/28/2002 | WO2001067249A3 Address decoding system and method for failure tolerance in a memory bank |
| 03/28/2002 | WO2001054134A3 Test method for a data memory |
| 03/28/2002 | US20020038443 Digital signal processing method, data recording and reproducing apparatus, and data recording medium that are resistant to burst errors |
| 03/28/2002 | US20020038260 Semiconductor device, sales method for semiconductor device, sales system for semiconductor device and program product storing sales program for semiconductor device |
| 03/28/2002 | US20020036939 Qualfication test method and circuit for a non-volatile memory |
| 03/28/2002 | US20020036938 Semiconductor memory device that is tested even with fewer test pins |
| 03/28/2002 | US20020036932 Semiconductor memory device and method of repairing same |
| 03/28/2002 | US20020036930 Nonvolatile semiconductor memory device |
| 03/28/2002 | US20020036925 Non-volatile semiconductor memory |
| 03/28/2002 | DE10124878A1 Testvorrichtung für Halbleiterbauelemente Test apparatus for semiconductor devices |
| 03/28/2002 | DE10061962A1 Method for operating a test device for high-speed semiconductor components in which the test device is first pre-calibrated to take into account time of flight measurements within its own and connection components |
| 03/28/2002 | DE10060436A1 Test device for high frequency testing of fast integrated circuits has low and high frequency communications connections, arrangement for producing and receiving high frequency test signals |
| 03/28/2002 | DE10042620A1 Memory module testing arrangement e.g. for SDRAM, has test device connected to memory module through bus switches arranged in a tree structure |
| 03/28/2002 | DE10042224A1 Module test socket for test adapters is constituted so that the principal surfaces of the module being tested and the connector plate lie in the same planes |
| 03/27/2002 | EP1191543A2 Semiconductor memory device |
| 03/27/2002 | EP1190324A1 Process for the secure writing of a pointer for a circular memory |
| 03/27/2002 | EP1190264A1 Integrated circuit and method for determining the current yield of a part of the integrated circuit |
| 03/27/2002 | EP0813711B1 Error management processes for flash eeprom memory arrays |
| 03/26/2002 | USRE37611 Non-volatile memory system having internal data verification test mode |
| 03/26/2002 | US6363500 Device and method for outputting positional information for LSI cells and recording medium for positional information output program for LSI cells |
| 03/26/2002 | US6363022 Semiconductor memory device tester |
| 03/26/2002 | US6363021 Redundancy method capable of disabling and replacing redundant memory cells that are defective |
| 03/26/2002 | US6363020 Architecture with multi-instance redundancy implementation |
| 03/26/2002 | US6362999 Semiconductor device including a repetitive pattern |
| 03/26/2002 | US6362990 Three port content addressable memory device and methods for implementing the same |
| 03/26/2002 | US6362499 Ferroelectric transistors using thin film semiconductor gate electrodes |
| 03/21/2002 | US20020035718 Semiconductor device trimming method, semiconductor device trimming apparatus, and method for creating semiconductor device trimming table |
| 03/21/2002 | US20020034115 Semiconductor memory device having fixed CAS latency in normal operation and various CAS latencies in test mode |
| 03/21/2002 | US20020034114 Refresh-free semiconductor memory device |
| 03/21/2002 | US20020034112 Semiconductor device operable in a plurality of test operation modes |
| 03/21/2002 | US20020034110 CMOS basic cell and method for fabricating semiconductor integrated circuit using the same |
| 03/21/2002 | US20020034093 Semiconductor memory device capable of repairing small leak failure |
| 03/21/2002 | US20020033723 Semiconductor memory device which controls sense amplifier for detecting bit line bridge and method of controlling the semiconductor memory device |
| 03/20/2002 | EP0903753B1 Nonvolatile semiconductor memory |
| 03/20/2002 | EP0868746B1 Laser fuse bank structure |
| 03/19/2002 | US6360346 Storage unit, method of checking storage unit, reading and writing method |
| 03/19/2002 | US6360342 Built-in self test for multiple memories in a chip |
| 03/19/2002 | US6360341 Editing apparatus and generating method for physical conversion definition |
| 03/19/2002 | US6360340 Memory tester with data compression |
| 03/19/2002 | US6359820 Integrated memory and method for checking the operation of memory cells in an integrated memory |
| 03/19/2002 | US6359819 Circuit and method for performing a stress test on a ferroelectric memory device |
| 03/19/2002 | US6359818 Apparatus for analyzing failure for semiconductor memory device |
| 03/19/2002 | US6359817 Circuit and method for testing a memory device |
| 03/19/2002 | US6359816 Response time measurement |
| 03/19/2002 | US6359811 Semiconductor integrated circuit with random access memory testing |
| 03/19/2002 | US6359459 Integrated circuits including voltage-controllable power supply systems that can be used for low supply voltage margin testing and related methods |
| 03/14/2002 | WO2001061572A3 An efficient memory allocation scheme for data collection |
| 03/14/2002 | US20020032891 Data processing system and data processing method |
| 03/14/2002 | US20020032887 Test circuit of semiconductor integrated circuit |
| 03/14/2002 | US20020032837 Rebuild bus utilization |
| 03/14/2002 | US20020032537 Method and system for testing RAMBUS memory modules |
| 03/14/2002 | US20020031026 Memory testing method and memory testing apparatus |
| 03/14/2002 | US20020031025 Semiconductor memory device performing redundancy repair based on operation test and semiconductor integrated circuit device having the same |
| 03/14/2002 | US20020031024 Semiconductor device having redundancy circuit |
| 03/14/2002 | US20020031023 Semiconductor memory device with redundancy circuit |
| 03/14/2002 | US20020031022 Semiconductor memory having multiple redundant columns with offset segmentation boundaries |
| 03/14/2002 | US20020031021 Semiconductor device with flexible redundancy system |
| 03/14/2002 | US20020031017 Nonvolatile semiconductor memory device and test method with memory-assisted roll call |