Patents
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
01/2002
01/10/2002US20020003725 Logic consolidated semiconductor memory device having memory circuit and logic circuit integrated in the same chip
01/10/2002US20020003433 Method and apparatus for testing semiconductor devices
01/10/2002US20020003279 Semiconductor memory device having row repair circuitry
01/09/2002EP1169677A1 Programmable read-only memory and method for operating said read-only memory
01/08/2002US6338154 Apparatus and method for generating addresses in a built-in self memory testing circuit
01/08/2002US6337829 Semiconductor memory device and method for repairing thereof
01/08/2002US6337828 Semiconductor memory device having function of supplying stable power supply voltage
01/08/2002US6337820 Dynamic memory device performing stress testing
01/08/2002US6337819 Semiconductor device having on-chip terminal with voltage to be measured in test
01/08/2002US6337818 Semiconductor memory device having a redundancy construction
01/08/2002US6337817 Semiconductor device having redundancy circuit
01/08/2002US6337816 Column redundancy circuit for semiconductor memory
01/08/2002US6337815 Semiconductor memory device having redundant circuit
01/08/2002US6337814 Semiconductor memory device having reference potential generating circuit
01/08/2002US6337812 Semiconductor device
01/03/2002WO2002001719A2 Method and apparatus for testing high performance circuits
01/03/2002US20020001904 Semiconductor memory device including spare memory cell
01/03/2002US20020001896 Column redundancy circuit
01/03/2002US20020001253 Integrated circuit device which outputs data after a latency period transpires
01/03/2002US20020001252 Semiconductor memory device and method of operation having delay pulse generation
01/03/2002US20020001246 Semiconductor memory device
01/03/2002US20020001242 Dynamic memory circuit including spare cells
01/03/2002US20020001241 Redundancy memory circuit
01/03/2002US20020001237 Non-volatile memory device with configurable row redundancy
01/03/2002US20020001236 Memory circuit with dynamic redundancy
01/03/2002US20020001235 Semiconductor memory device allowing effective detection of leak failure
01/03/2002US20020001233 Read protection circuit of nonvolatile memory
01/03/2002US20020000867 Fuse latch having multiplexers with reduced sizes and lower power consumption
01/03/2002US20020000837 256 meg dynamic random access memory
01/03/2002US20020000832 Programmable circuit with preview function
01/03/2002US20020000582 Semiconductor device including voltage down converter allowing tuning in short period of time and reduction of chip area
01/03/2002CA2410432A1 Method and apparatus for testing high performance circuits
01/02/2002EP1168369A2 Synchronous semiconductor memory device
01/02/2002EP1168365A2 Negative-voltage bias circuit
01/02/2002EP1168362A2 Flash memory with improved erasability and its circuitry
01/02/2002EP1168356A1 Circuit for equalization of different voltages on connection lines in integrated semiconductor devices
01/02/2002EP1168179A1 Dynamic memory with spare cells
01/02/2002EP0932904B1 Overvoltage detection circuit for test mode selection
01/02/2002CN1329337A Method for repairing defect of dynamic random access internal memory and state display
01/02/2002CN1329254A Method and equipment for testing semiconductor device
01/01/2002US6336202 Data storage system, storage medium and method of controlling a data storage system
01/01/2002US6335902 Semiconductor memory device provided with generating means for internal clock signal for special mode
01/01/2002US6335897 Semiconductor memory device including redundancy circuit adopting latch cell
01/01/2002US6335891 Device and method for reducing standby current in a memory device by disconnecting bit line load devices in unused columns of the memory device from a supply voltage
01/01/2002US6335888 Margin-range apparatus for a sense amp's voltage-pulling transistor
01/01/2002US6335887 Semiconductor memory device allowing switching of word configuration
01/01/2002US6335886 Semiconductor memory device including spare memory cell
01/01/2002US6335876 Semiconductor memory and method of testing the same
01/01/2002US6335875 Memory circuit/logic circuit integrated device capable of reducing term of works
01/01/2002US6335652 Method and apparatus for the replacement of non-operational metal lines in DRAMS
01/01/2002US6335209 Method for testing semiconductor memory devices, and apparatus and system for testing semiconductor memory
12/2001
12/27/2001US20010056567 Address parity error processing method, and apparatus and storage for the method
12/27/2001US20010056558 Configuration memory integrated circuit
12/27/2001US20010056557 Semiconductor integrated circuit device including semiconductor memory with tester circuit capable of analyzing redundancy repair
12/27/2001US20010056527 Storage system
12/27/2001US20010056521 Information processing system with memory element performance-dependent memory control
12/27/2001US20010055236 Semiconductor memory that enables high speed operation
12/27/2001US20010055233 Semiconductor memory device
12/27/2001US20010055230 Semiconductor memory and memory board therewith
12/27/2001US20010055229 Semiconductor memory device and testing system and testing method
12/27/2001US20010055228 Semiconductor memory device having a redundancy construction
12/27/2001US20010055226 Semiconductor integrated circuit device allowing accurate evaluation of access time of memory core contained therein and access time evaluating method
12/27/2001US20010055219 Semiconductor integrated circuit
12/27/2001US20010055218 256 meg dynamic random access memory
12/27/2001US20010055022 Serial access memory and data write/read method
12/27/2001US20010054909 Integrated circuit device having a burn-in mode for which entry into and exit from can be controlled
12/27/2001US20010054760 Semiconductor integrated circuit
12/26/2001CN1328688A Circuir for generating reference voltage for reading out from ferroelectric memory
12/25/2001US6333888 Semiconductor memory device
12/25/2001US6333887 Circuits and methods for selectively coupling redundant elements into an integrated circuit
12/25/2001US6333880 Semiconductor memory device capable of detecting high-voltage test command signal
12/25/2001US6333879 Semiconductor device operable in a plurality of test operation modes
12/25/2001US6333878 Semiconductor memory device having program circuit
12/25/2001US6333877 Static type semiconductor memory device that can suppress standby current
12/25/2001US6333876 Semiconductor memory device
12/25/2001US6333872 Self-test method for testing read stability in a dual-port SRAM cell
12/25/2001US6333864 Power supply adjusting circuit and a semiconductor device using the same
12/25/2001US6333667 Antifuse programming circuit
12/25/2001US6333666 Antifuse circuit being programmable by using no connection pin
12/25/2001US6333530 Semiconductor memory device having redundancy function
12/25/2001US6333517 Semiconductor integrated circuit device equipped with power make-up circuit used in burn-in test after packaging and method for testing the same
12/20/2001WO2001097231A1 Fail analyzer
12/20/2001WO2001097226A2 Semiconductor memory having segmented row repair
12/20/2001WO2001097032A1 Secure eeprom comprising an error correction circuit
12/20/2001WO2001067248A3 Digital memory circuit
12/20/2001US20010054165 Memory device having redundant cells
12/20/2001US20010054164 Semiconductor memory device allowing mounting of built-in self test circuit without addition of interface specification
12/20/2001US20010054141 Microsequencer with nested loop counters
12/20/2001US20010054136 Storage system
12/20/2001US20010053960 Adjustment method for reducing channel skew of test system
12/20/2001US20010053102 Device with integrated SRAM memory and method of testing such a device
12/20/2001US20010053101 Semiconductor memory having segmented row repair
12/20/2001US20010053086 Semiconductor memory device with memory test circuit
12/20/2001US20010052792 Semiconductor integrated circuit device including logic gate that attains reduction of power consumption and high-speed operation
12/20/2001US20010052789 Integrated circuit configuration for testing transistors, and a semiconductor wafer having such a circuit configuration
12/20/2001US20010052633 Semiconductor device
12/20/2001US20010052599 Semiconductor memory device including plurality of global data lines in parallel arrangement with low parasitic capacitance, and fabrication method thereof
12/20/2001DE10063623A1 Semiconductor memory has select drive circuit which selectively drives dummy word line transistor, while operating in test mode
12/20/2001DE10028145A1 Integrierte Schaltungsanordnung zum Testen von Transistoren An integrated circuit device for testing transistors
12/19/2001EP1164589A1 Storage device having an error correction function