Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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02/26/2002 | US6351140 Low current redundancy anti-fuse method and apparatus |
02/21/2002 | WO2002015356A1 Memory access conversion mechanism |
02/21/2002 | WO2002015196A1 Memory location arrangement |
02/21/2002 | WO2002014886A2 Method to descramble the data mapping in memory circuits |
02/21/2002 | US20020023248 Medium defect detection method and data storage apparatus |
02/21/2002 | US20020021614 Semiconductor memory device having column redundancy scheme to improve redundancy efficiency |
02/21/2002 | US20020021607 Device and method for margin testing a semiconductor memory by applying a stressing voltage simultaneously to complementary and true digit lines |
02/21/2002 | US20020021605 Nonvolatile semiconductor memory with testing circuit |
02/21/2002 | US20020021604 Semiconductor memory having a redundancy circuit for word lines and method for operating the memory |
02/21/2002 | US20020021603 Apparatus and method for package level burn-in test in semiconductor device |
02/21/2002 | US20020021602 Semiconductor device allowing external setting of internal power supply voltage generated by a voltage down converter at the time of testing |
02/21/2002 | US20020021600 Semiconductor memory device with a redundancy structure |
02/21/2002 | US20020021599 System and method for safe high-temperature operation of a flash memory |
02/21/2002 | US20020021593 Semiconductor memory device with a redundancy structure |
02/21/2002 | US20020021592 Semiconductor memory device capable of independent selection of normal and redundant memory cells after programming of redundant address |
02/21/2002 | US20020021179 Ring oscillator having variable capacitance circuits for frequency adjustment |
02/21/2002 | US20020021141 Apparatus for testing semiconductor devices |
02/21/2002 | US20020020854 Integrated circuit, test structure and method for testing integrated circuits |
02/21/2002 | DE10057202A1 Arrangement for checking graphic memory component functionality has test computer unit that reads control data from memory element, checks memory component functionality from data |
02/21/2002 | DE10038664A1 Halbleiterspeicher nit Redundanz-Schaltung für Wortleitungen Semiconductor memory nit redundancy circuit for word lines |
02/21/2002 | DE10037992A1 Verfahren zum Betreiben eines Logik- und Speicherelemente aufweisenden Bausteins A method of operating a logic and memory elements having block |
02/21/2002 | DE10037988A1 Vorrichtung und Verfahren zum Testen von Halbleiterspeichern Apparatus and method for testing semiconductor memories |
02/21/2002 | DE10034855A1 System zum Test von schnellen integrierten Digitalschaltungen, insbesondere Halbleiterspeicherbausteinen A system for fast test of integrated digital circuits, especially semiconductor memory devices |
02/20/2002 | CN1336553A Mode generator used for testing semiconductor system |
02/19/2002 | US6349400 Optical disc recording/reproducing method, optical disc and optical disc device |
02/19/2002 | US6349397 Signal processing apparatus having non-volatile memory and programming method of the non-volatile memory |
02/19/2002 | US6349240 Semiconductor device manufacturing system and method of manufacturing semiconductor devices |
02/19/2002 | US6349066 Semiconductor storage device having a self-refresh circuit for automatically refreshing memory cell |
02/19/2002 | US6349065 Semiconductor memory device allowing acceleration testing, and a semi-finished product for an integrated semiconductor device that allows acceleration testing |
02/19/2002 | US6349064 Semiconductor memory device capable of independent selection of normal and redundant memory cells after programming of redundant address |
02/19/2002 | US6349063 Semiconductor memory devices and driving methods |
02/19/2002 | US6349057 Read protection circuit of nonvolatile memory |
02/19/2002 | US6348356 Method and apparatus for determining the robustness of memory cells to alpha-particle/cosmic ray induced soft errors |
02/14/2002 | WO2001053944A3 Redundant data memory |
02/14/2002 | US20020019961 Device and method for repairing a semiconductor memory |
02/14/2002 | US20020019957 Built-in-self-test and self-repair methods and devices for computer memories comprising a reconfiguration memory device |
02/14/2002 | US20020018389 Data storing method of dynamic RAM and semiconductor memory device |
02/14/2002 | US20020018383 Semiconductor memory device |
02/14/2002 | US20020018381 Method of testing a memory array |
02/14/2002 | US20020018380 Semiconductor circuit |
02/14/2002 | US20020018376 Method and a device for testing electronic memory devices |
02/14/2002 | US20020018365 Test methodes for semiconductor non-volatile memories |
02/14/2002 | US20020018363 Semiconductor storage device using redundancy method |
02/14/2002 | US20020017720 Semiconductor device |
02/14/2002 | US20020017688 Semiconductor memory circuit |
02/14/2002 | DE10040093C1 Memory cell arrangement has non-volatile memory with locking cell, additional memory element coupled to locking cell on input side, to locking element on output side to control it |
02/14/2002 | DE10036177A1 Equipment for quality testing of semiconductor devices, measures gap between valence band and conduction band of semiconductor devices |
02/14/2002 | DE10034854A1 Verfahren und Vorrichtung zur Erzeugung digitaler Signalmuster Method and apparatus for generating digital signal samples |
02/14/2002 | DE10034851A1 Schaltungsanordnung zur Erzeugung von Steuersignalen zum Test hochfrequenter synchroner Digitalschaltungen Circuit arrangement for generating control signals for testing digital circuits of high-frequency synchronous |
02/14/2002 | DE10034850A1 Integrated digital semiconductor components testing system e.g. for semiconductor memories, has built outside self-test module that adjusts to time requirement of semiconductor to be tested |
02/13/2002 | EP0978125B1 System for optimizing memory repair time using test data |
02/13/2002 | CN1335645A Semi-conductor storage apparatus |
02/12/2002 | US6347386 System for optimizing the testing and repair time of a defective integrated circuit |
02/12/2002 | US6347381 Test mode circuitry for electronic storage devices and the like |
02/12/2002 | US6347287 Calibration system and method for receiver guardband reductions |
02/12/2002 | US6347056 Recording of result information in a built-in self-test circuit and method therefor |
02/12/2002 | US6347051 Storage device employing a flash memory |
02/12/2002 | US6346845 Fuse circuits and methods that can sense the state of a fuse that is programmed but not open |
02/12/2002 | US6346834 Power on reset circuit |
02/12/2002 | US6346738 Fuse option circuit of integrated circuit and method thereof |
02/07/2002 | WO2002011149A1 Defect analysis method, defect analyzer, and computer program product |
02/07/2002 | US20020016942 Hard/soft error detection |
02/07/2002 | US20020016941 Semiconductor memory device tester |
02/07/2002 | US20020016940 Method for verifying user memory validity in operating system |
02/07/2002 | US20020016897 Use of a microcontroller to process memory configuration information and configure a memory controller |
02/07/2002 | US20020016876 System having double data transfer rate and integrated circuit therefor |
02/07/2002 | US20020015351 Method of operating a memory device having a variable data input length |
02/07/2002 | US20020015343 Electronic circuit, test-apparatus assembly, and method for outputting a data item |
02/07/2002 | US20020015342 Semiconductor integrated circuit having circuit for data transmission distance measurement and memory processing system with the same |
02/07/2002 | US20020015341 Semiconductor memory device capable of recovering defective bit and a system having the same semiconductor memory device |
02/07/2002 | US20020015337 Integrated memory with redundancy |
02/07/2002 | US20020015328 Semiconductor integrated circuit |
02/07/2002 | US20020014673 Method of making membrane integrated circuits |
02/07/2002 | US20020014636 Semiconductor device |
02/07/2002 | US20020014635 Mode selection circuit for semiconductor memory device |
02/07/2002 | DE10035169A1 Verfahren und Vorrichtung zum Testen von Setup-Zeit und Hold-Zeit von Signalen einer Schaltung mit getakteter Datenübertragung Method and device for testing of setup time and hold time of signals of a circuit having a clocked data transfer |
02/07/2002 | DE10034928A1 Anordnung zur Redundanzimplementierung für Speicherbaustein Arrangement for redundancy implementation for memory module |
02/07/2002 | DE10034900A1 Test system for quick synchronous digital circuit, has BOST module with switching unit for switching between two operation modes based on detected switching criteria of changeover switching |
02/07/2002 | DE10034852A1 Verfahren und Vorrichtung zum Einlesen und zur Überprüfung der zeitlichen Lage von aus einem zu testenden Speicherbaustein ausgelesenen Datenantwortsignalen Method and apparatus for reading and for checking the timing of read out of a memory under test module data response signals |
02/07/2002 | DE10016996C1 Testanordnung zur Funktionsprüfung eines Halbleiterchips Test set for testing the function of a semiconductor chip |
02/06/2002 | EP1178321A2 Method of operating a component having a logic and a memory portion |
02/06/2002 | EP0793173B1 Non-volatile semiconductor storage unit having a correction coding circuit |
02/06/2002 | CN1334466A Modular structure for testing momery in testing system based on event |
02/05/2002 | US6345372 Method for testing bus connections of writable and readable integrated electronic circuits, in particular memory components |
02/05/2002 | US6345371 Method of performing diagnostic procedures on a queue structure |
02/05/2002 | US6345367 Defective memory block handling system by addressing a group of memory blocks for erasure and changing the content therewith |
02/05/2002 | US6345013 Latched row or column select enable driver |
02/05/2002 | US6345005 Integrated circuit with efficient testing arrangement |
02/05/2002 | US6345004 Repair analysis circuit for redundancy, redundant repairing method, and semiconductor device |
02/05/2002 | US6345003 Redundancy circuits for integrated circuit memory devices including repair controlling circuits and enable controlling circuits |
01/31/2002 | WO2002008904A2 System initialization of microcode-based memory built-in self-test |
01/31/2002 | US20020013925 Optical disc recording/reproducing method, optical disc and optical disc device |
01/31/2002 | US20020013924 Semiconductor memory device having ECC type error recovery circuit |
01/31/2002 | US20020013920 Pattern generator for semiconductor test system |
01/31/2002 | US20020013916 Loosely coupled mass storage computer cluster |
01/31/2002 | US20020012286 Address counter for addressing synchronous high-frequency digital circuits, in particular memory devices |
01/31/2002 | US20020012283 System for testing fast synchronous semiconductor circuits |
01/31/2002 | US20020012282 Semiconductor memory and nonvolatile semiconductor memory having redundant circuitry for replacing defective memory cell |
01/31/2002 | US20020012281 Configuration for implementing redundancy for a memory chip |
01/31/2002 | US20020012270 Semiconductor memory device for effecting erasing operation in block unit |