| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 06/04/2002 | US6401179 Method for storing reference information and apparatus therefor |
| 06/04/2002 | US6400632 Semiconductor device including a fuse circuit in which the electric current is cut off after blowing so as to prevent voltage fall |
| 06/04/2002 | US6400625 Semiconductor integrated circuit device capable of performing operational test for contained memory core at operating frequency higher than that of memory tester |
| 06/04/2002 | US6400624 Configure registers and loads to tailor a multi-level cell flash design |
| 06/04/2002 | US6400623 Semiconductor memory having parallel test mode |
| 06/04/2002 | US6400622 Semiconductor memory device |
| 06/04/2002 | US6400621 Semiconductor memory device and method of checking same for defect |
| 06/04/2002 | US6400620 Semiconductor memory device with burn-in test function |
| 06/04/2002 | US6400619 Micro-cell redundancy scheme for high performance eDRAM |
| 06/04/2002 | US6400618 Semiconductor memory device with efficient redundancy operation |
| 06/04/2002 | US6400617 Semiconductor memory circuit having selective redundant memory cells |
| 06/04/2002 | US6400605 Method and system for pulse shaping in test and program modes |
| 06/04/2002 | US6400602 Semiconductor memory device and restoration method therefor |
| 06/04/2002 | US6400595 256 meg dynamic access memory |
| 06/04/2002 | US6400292 Semiconductor integrated circuit device |
| 05/30/2002 | WO2002043074A1 Device for stressing an integrated ferroelectric semiconductor memory circuit |
| 05/30/2002 | US20020066058 Synchronous semiconductor device, and inspection system and method for the same |
| 05/30/2002 | US20020066057 Method and apparatus for processing defect addresses |
| 05/30/2002 | US20020066056 Testing board for semiconductor memory, method of testing semiconductor memory and method of manufacturing semiconductor memory |
| 05/30/2002 | US20020066052 Method and apparatus for scheduling and using memory calibrations to reduce memory errors in high speed memory devices |
| 05/30/2002 | US20020064079 Semiconductor memory device having a plurality of low power consumption modes |
| 05/30/2002 | US20020064073 Dram module and method of using sram to replace damaged dram cell |
| 05/30/2002 | US20020063571 Charge gain stress test circuit for nonvolatile memory and test method using the same |
| 05/30/2002 | US20020063570 Apparatus and method for measuring electrical characteristics of a semiconductor element in a packaged semiconductor device |
| 05/30/2002 | US20020063085 Enhanced grading and sorting of semiconductor devices using modular "plug-in" sort algorithms |
| 05/29/2002 | EP1208568A1 A memory module test system with reduced driver output impedance |
| 05/29/2002 | EP0791934B1 Semiconductor memory device |
| 05/29/2002 | DE10150321A1 Verfahren und Vorrichtung zum Testen von integrierten Schaltungen Method and device for testing integrated circuits |
| 05/29/2002 | DE10058220A1 Method for operating a device running an operating program and having data storage runs a storage test to interrupt the execution of the operating program at preset time intervals and test selected partial data storage areas. |
| 05/28/2002 | US6397366 Data transmission system, data recording and reproducing apparatus and recording medium each having data structure of error correcting code |
| 05/28/2002 | US6397365 Memory error correction using redundant sliced memory and standard ECC mechanisms |
| 05/28/2002 | US6397363 Semiconductor integrated circuit device with test circuit |
| 05/28/2002 | US6397361 Reduced-pin integrated circuit I/O test |
| 05/28/2002 | US6397357 Method of testing detection and correction capabilities of ECC memory controller |
| 05/28/2002 | US6397353 Method and apparatus for protecting sensitive data during automatic testing of hardware |
| 05/28/2002 | US6397349 Built-in self-test and self-repair methods and devices for computer memories comprising a reconfiguration memory device |
| 05/28/2002 | US6397348 Redundant array of disk drives with asymmetric mirroring and asymmetric mirroring data processing method |
| 05/28/2002 | US6397314 Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices |
| 05/28/2002 | US6397313 Redundant dual bank architecture for a simultaneous operation flash memory |
| 05/28/2002 | US6396768 Synchronous semiconductor memory device allowing easy and fast test |
| 05/28/2002 | US6396760 Memory having a redundancy scheme to allow one fuse to blow per faulty memory column |
| 05/28/2002 | US6396759 Semiconductor device with test fuse links, and method of using the test fuse links |
| 05/28/2002 | US6396758 Semiconductor memory device |
| 05/28/2002 | US6396754 Semiconductor memory device which controls sense amplifier for detecting bit line bridge and method of controlling the semiconductor memory device |
| 05/28/2002 | US6396753 Method and structure for testing embedded flash memory |
| 05/28/2002 | US6396752 Method of testing a memory cell having a floating gate |
| 05/28/2002 | US6396751 Semiconductor device comprising a test structure |
| 05/28/2002 | US6396750 Integrated memory with redundancy and method for repairing an integrated memory |
| 05/28/2002 | US6396749 Dual-ported CAMs for a simultaneous operation flash memory |
| 05/28/2002 | US6396748 Method and apparatus for setting redundancy data for semiconductor memory device |
| 05/28/2002 | US6396742 Testing of multilevel semiconductor memory |
| 05/28/2002 | US6395622 Manufacturing process of semiconductor devices |
| 05/23/2002 | WO2001071726A3 Method and apparatus for improving the testing, yield and performance of very large scale integrated circuits |
| 05/23/2002 | US20020062473 Semiconductor device and semiconductor storage device testing method |
| 05/23/2002 | US20020062458 Semiconductor integrated circuit device |
| 05/23/2002 | US20020061606 Semiconductor wafer, semiconductor chip, semiconductor device and method for manufacturing semiconductor device |
| 05/23/2002 | US20020060939 Structure to inspect high/low of memory cell threshold voltage using current mode sense amplifier |
| 05/23/2002 | US20020060935 Defective address storage scheme for memory device |
| 05/23/2002 | US20020060934 Semiconductor memory device and method of identifying programmed defective address thereof |
| 05/23/2002 | US20020060933 Semiconductor device and multichip module |
| 05/23/2002 | US20020060931 Semiconductor memory circuit |
| 05/22/2002 | EP1207458A2 Data-storing device |
| 05/22/2002 | EP1206775A2 Flash memory device with externally triggered detection and repair of leaky cells |
| 05/22/2002 | EP1105802B1 Method for repairing faulty storage cells of an integrated memory |
| 05/22/2002 | EP1088311B1 Electronic test memory device |
| 05/22/2002 | EP1031995B1 Built-in self-test circuit for memory |
| 05/22/2002 | EP0632381B1 Fault-tolerant computer systems |
| 05/21/2002 | US6393542 Electronic circuit system and interface circuit that compares read and write clock operations |
| 05/21/2002 | US6393513 Identification and verification of a sector within a block of mass storage flash memory |
| 05/21/2002 | US6393504 Dynamic address mapping and redundancy in a modular memory device |
| 05/21/2002 | US6393378 Circuit and method for specifying performance parameters in integrated circuits |
| 05/21/2002 | US6392956 Semiconductor memory that enables high speed operation |
| 05/21/2002 | US6392953 Semiconductor memory |
| 05/21/2002 | US6392948 Semiconductor device with self refresh test mode |
| 05/21/2002 | US6392941 Wordline and pseudo read stress test for SRAM |
| 05/21/2002 | US6392940 Semiconductor memory circuit |
| 05/21/2002 | US6392939 Semiconductor memory device with improved defect elimination rate |
| 05/21/2002 | US6392938 Semiconductor memory device and method of identifying programmed defective address thereof |
| 05/21/2002 | US6392937 Redundancy circuit of semiconductor memory |
| 05/21/2002 | US6392923 Magnetoresistive midpoint generator and method |
| 05/21/2002 | US6392918 Circuit configuration for generating a reference voltage for reading a ferroelectric memory |
| 05/21/2002 | US6392910 Priority encoder with multiple match function for content addressable memories and methods for implementing the same |
| 05/21/2002 | US6392909 Semiconductor memory device having fixed CAS latency in normal operation and various CAS latencies in test mode |
| 05/21/2002 | US6392436 Programmable circuit with preview function |
| 05/21/2002 | US6392427 Testing electronic devices |
| 05/21/2002 | US6391665 Method of monitoring a source contact in a flash memory |
| 05/16/2002 | WO2002039460A2 Full-speed bist controller for testing embedded synchronous memories |
| 05/16/2002 | WO2002039459A2 System for communicating with synchronous device |
| 05/16/2002 | WO2002039458A1 AT-SPEED BUILT-IN SELF TESTING OF MULTI-PORT COMPACT sRAMs |
| 05/16/2002 | WO2002039457A2 Memory management logic for expanding the utilization of read-only memories |
| 05/16/2002 | US20020059547 Semiconductor integrated circuit including a test facilitation circuit for functional blocks intellectual properties and automatic insertion method of the same test facilitation circuit |
| 05/16/2002 | US20020059543 Full-speed bist controller for testing embedded synchronous memories |
| 05/16/2002 | US20020059540 Loosley coupled mass storage computer cluster |
| 05/16/2002 | US20020059012 Method of manufacturing semiconductor devices |
| 05/16/2002 | US20020059010 Failure analyzing device for semiconductors |
| 05/16/2002 | US20020057636 Information recording method and apparatus |
| 05/16/2002 | US20020057608 Data-storing device |
| 05/16/2002 | US20020057605 Semiconductor memory device and method for replacing redundancy circuit |
| 05/16/2002 | US20020057589 Semiconductor device including a repetitive pattern |
| 05/16/2002 | US20020057546 Semiconductor integrated circuit device having pseudo-tuning function |