| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 08/01/2002 | US20020104056 System and method for building a checksum |
| 08/01/2002 | US20020104049 Semiconductor test system and method for effectively testing a semiconductor device having many pins |
| 08/01/2002 | US20020104045 System and method for identifying memory modules having a failing or defective address |
| 08/01/2002 | US20020101906 Method for determining the temperature of a semiconductor component |
| 08/01/2002 | US20020101777 Method and apparatus for initializing an integrated circuit using compressed data from a remote fusebox |
| 08/01/2002 | US20020101774 Semiconductor memory device with controllable operation timing of sense amplifier |
| 08/01/2002 | US20020101773 Semiconductor memory device having intermediate voltage generating circuit |
| 08/01/2002 | US20020101771 Redundant decoder circuit |
| 08/01/2002 | US20020101764 Nonvolatile semiconductor memory and automatic erasing/writing method thereof |
| 08/01/2002 | US20020100936 Gate insulating structure for power devices, and related manufacturing process |
| 07/31/2002 | EP1227504A2 Semiconductor memory device |
| 07/31/2002 | EP1227503A2 Semiconductor storage device formed to optimize test technique and redundancy technology |
| 07/31/2002 | EP1227502A1 Connection pad arrangements for electronic circuit comprising both functional logic and flash-EEPROM |
| 07/31/2002 | EP1226585A1 Device for analysis of a signal from a ferroelectric storage capacitor |
| 07/31/2002 | EP1226444A1 Multi-stage algorithmic pattern generator for testing ic chips |
| 07/31/2002 | EP1141835B1 Integrated memory with redundancy |
| 07/31/2002 | EP1073906B1 Method and apparatus for protecting sensitive data during automatic testing of hardware |
| 07/31/2002 | EP0978124B1 A method for testing integrated memory using an integrated dma controller |
| 07/31/2002 | EP0961936B1 Semiconductor tester with data serializer |
| 07/30/2002 | US6427216 Integrated circuit testing using a high speed data interface bus |
| 07/30/2002 | US6426916 Memory device having a variable data output length and a programmable register |
| 07/30/2002 | US6426912 Test circuit for testing semiconductor memory |
| 07/30/2002 | US6426910 Enhanced fuse configurations for low-voltage flash memories |
| 07/30/2002 | US6426903 Redundancy arrangement using a focused ion beam |
| 07/30/2002 | US6426902 Semiconductor memory device having redundancy circuit capable of improving redundancy efficiency |
| 07/30/2002 | US6426901 Logic consolidated semiconductor memory device having memory circuit and logic circuit integrated in the same chip |
| 07/25/2002 | WO2002057920A2 Simple fault tolerance for memory |
| 07/25/2002 | US20020099995 Marking of and searching for initial defective blocks in semiconductor memory |
| 07/25/2002 | US20020099987 Method for guaranteeing a minimum data strobe valid window and a minimum data valid window for DDR memory devices |
| 07/25/2002 | US20020099984 High efficiency, error minimizing coding strategy method and apparatus |
| 07/25/2002 | US20020099896 Integrated circuit device having double data rate capability |
| 07/25/2002 | US20020098602 Semiconductor integrated circuit |
| 07/25/2002 | US20020097626 Semiconductor memory device |
| 07/25/2002 | US20020097619 Test circuit for an analog measurement of bit line signals of ferroelectric memory cells |
| 07/25/2002 | US20020097618 Semiconductor memory |
| 07/25/2002 | US20020097617 Static semiconductor memory device capable of accurately detecting failure in standby mode |
| 07/25/2002 | US20020097616 Semiconductor component for connection to a test system |
| 07/25/2002 | US20020097615 Connection pad arrangements for electronic circuit comprising both functional logic and Flash-EEPROM |
| 07/25/2002 | US20020097613 Self-healing memory |
| 07/25/2002 | US20020097611 Semiconductor memory device which can be simultaneously tested even when the number of semiconductor memory devices is large and semiconductor wafer on which the semiconductor memory devices are formed |
| 07/25/2002 | US20020097610 Semiconductor device |
| 07/25/2002 | US20020097609 Semiconductor storage apparatus |
| 07/25/2002 | US20020097604 Semiconductor memory device having faulty cells |
| 07/25/2002 | US20020097083 Switching circuit and semiconductor device |
| 07/25/2002 | US20020097074 Synchronous semiconductor device for adjusting phase offset in a delay locked loop |
| 07/25/2002 | DE10201573A1 Redundant decoder switching circuit for use with a memory component with main and redundant memory cells has devices to store address data in a faulty main memory cell and to compare it with externally supplied addresses. |
| 07/25/2002 | DE10158004A1 Schaltkreis zur Speicherung defekter Adressen für ein Halbleiterspeicherbauelement Circuit for storing defective addresses of a semiconductor memory device |
| 07/25/2002 | DE10101268A1 Integrated semiconductor circuit for executing a built-in function redundant to a function block and a built-in function for a semiconductor circuit has function and redundancy blocks switched on for a failed function block. |
| 07/25/2002 | CA2435396A1 Simple fault tolerance for memory |
| 07/24/2002 | EP1225589A2 Semiconductor memory device having a plurality of low power consumption modes |
| 07/24/2002 | EP1225588A2 Method and circuit for determining sense amplifier sensitivity |
| 07/24/2002 | EP1224549A1 Redundant dual bank architecture for a simultaneous operation flash memory |
| 07/24/2002 | EP1224479A1 Built-in spare row and column replacement analysis system for embedded memories |
| 07/24/2002 | EP1031994B1 Built-in self-test circuit for memory |
| 07/23/2002 | US6425108 Replacement of bad data bit or bad error control bit |
| 07/23/2002 | US6425103 Programmable moving inversion sequencer for memory bist address generation |
| 07/23/2002 | US6425046 Method for using a latched sense amplifier in a memory module as a high-speed cache memory |
| 07/23/2002 | US6424587 Semiconductor memory device that is tested even with fewer test pins |
| 07/23/2002 | US6424584 Redundancy antifuse bank for a memory device |
| 07/23/2002 | US6424583 System and measuring access time of embedded memories |
| 07/23/2002 | US6424582 Semiconductor memory device having redundancy |
| 07/23/2002 | US6424576 Apparatus and methods for selectively disabling outputs in integrated circuit devices |
| 07/23/2002 | US6424142 Semiconductor device operable in a plurality of test operation modes |
| 07/18/2002 | WO2002025666A3 Control apparatus for testing a random access memory |
| 07/18/2002 | US20020095630 Memory device redundant repair analysis method, recording medium and apparatus |
| 07/18/2002 | US20020095623 Method and apparatus for testing a storage device |
| 07/18/2002 | US20020093874 Semiconductor memory device |
| 07/18/2002 | US20020093870 Semiconductor memory device |
| 07/18/2002 | US20020093867 Semiconductor device having electric fuse element |
| 07/18/2002 | US20020093866 Device and method for reducing standby current in a memory device by disconnecting bit line load devices in unused columns of the memory device from a supply voltage |
| 07/18/2002 | US20020093863 Circuit and method for testing a memory device |
| 07/18/2002 | US20020093862 Semiconductor memory device for reducing number of input cycles for inputting test pattern |
| 07/18/2002 | US20020093861 Design for test for micromirror DRAM |
| 07/18/2002 | US20020093860 Semiconductor memory device having redundancy system |
| 07/18/2002 | US20020093853 Semiconductor apparatus |
| 07/18/2002 | US20020093847 Ferroelectric storage device |
| 07/18/2002 | US20020093846 Nonvolatile ferroelectric memory device and method for detecting weak cell using the same |
| 07/18/2002 | US20020093373 Auto fusing circuit |
| 07/18/2002 | US20020093358 Parallel logic device/circuit tester for testing plural logic devices/circuits and parallel memory chip repairing apparatus |
| 07/18/2002 | US20020093037 Structure and method of repair of integrated circuits |
| 07/18/2002 | DE10141994A1 Halbleiterspeichervorrichtung zur Reduktion der Prüfzeitperiode A semiconductor memory device for reducing the Prüfzeitperiode |
| 07/18/2002 | DE10101234A1 Testing non-volatile memory involves producing test pattern, write access to memory with test pattern, read access to acquire test result and comparison with test pattern for agreement |
| 07/18/2002 | DE10063627A1 Integrierte Schaltung mit einer Datenverarbeitungseinheit und einem Zwischenspeicher Integrated circuit comprising a data processing unit and a latch |
| 07/18/2002 | DE10063626A1 Testing DRAM device performance involves simulating redundant memory cell activation in software prior to laser fuse repair, carrying out performance test with simulated configuration |
| 07/17/2002 | EP1222664A2 Method for identifying an integrated circuit |
| 07/17/2002 | EP1222545A1 Method and circuit configuration for storing data words in a ram module |
| 07/17/2002 | EP0931288B1 Layout for a semiconductor memory device having redundant elements |
| 07/17/2002 | CN1359524A Test device for testing a memory |
| 07/17/2002 | CN1359493A Process for the secure writing of a pointer for a circular memory |
| 07/16/2002 | US6421799 Redundancy correction ROM |
| 07/16/2002 | US6421798 Chipset-based memory testing for hot-pluggable memory |
| 07/16/2002 | US6421797 Integrated circuit memory devices and methods for generating multiple parallel bit memory test results per clock cycle |
| 07/16/2002 | US6421794 Method and apparatus for diagnosing memory using self-testing circuits |
| 07/16/2002 | US6421789 Synchronous semiconductor memory device capable of reducing test cost and method of testing the same |
| 07/16/2002 | US6421291 Semiconductor memory device having high data input/output frequency and capable of efficiently testing circuit associated with data input/output |
| 07/16/2002 | US6421286 Semiconductor integrated circuit device capable of self-analyzing redundancy replacement adapting to capacities of plural memory circuits integrated therein |
| 07/16/2002 | US6421285 Semiconductor storage device using redundancy method |
| 07/16/2002 | US6421284 Semiconductor device |
| 07/16/2002 | US6421283 Trap and patch system for virtual replacement of defective volatile memory cells |
| 07/16/2002 | US6421279 Flash memory control method and apparatus processing system therewith |