Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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10/01/2002 | US6459292 Testing system for semiconductor device |
10/01/2002 | US6459290 Test apparatus of integrated circuit |
10/01/2002 | US6459284 Device having periodic wiring structure and test device therefor |
09/26/2002 | WO2002075926A2 Antifuse reroute of dies |
09/26/2002 | WO2002075545A1 Method and device for testing a memory |
09/26/2002 | WO2002075342A1 Apparatus and method for testing circuit modules |
09/26/2002 | WO2002075337A2 Low-jitter clock for test system |
09/26/2002 | WO2002075336A2 Test system algorithmic program generators |
09/26/2002 | US20020138802 Built-in test support for an integrated circuit |
09/26/2002 | US20020138800 Built-in self test circuit employing a linear feedback shift register |
09/26/2002 | US20020138799 Data transfer apparatus, memory device testing apparatus, data transfer method, and memory device testing method |
09/26/2002 | US20020138798 Configuration for testing an integrated semiconductor memory and method for testing the memory |
09/26/2002 | US20020138797 Method of testing a sequential access memory plane and a corresponding sequential access memory semiconductor device |
09/26/2002 | US20020138784 Loosely coupled mass storage computer cluster |
09/26/2002 | US20020138708 Simple fault tolerance for memory |
09/26/2002 | US20020136071 Method for testing memory cell in semiconductor device |
09/26/2002 | US20020136070 Semiconductor memory device adopting redundancy system |
09/26/2002 | US20020136068 Data processing device with a WOM memory |
09/26/2002 | US20020136066 Built-in self-repair wrapper methodology, design flow and design architecture |
09/26/2002 | US20020136064 Semiconductor device having scan test circuit that switches clock signal between shift mode and capture mode, and method of testing the semiconductor device |
09/26/2002 | US20020136057 Nonvolatile semiconductor memory device having electrically and collectively erasable characteristics |
09/26/2002 | US20020135394 Memory modules and methods having a buffer clock that operates at different clock frequencies according to the operating mode |
09/26/2002 | DE10210902A1 Paralleltestplatine und zugehöriges Speichermodultestverfahren Parallel test board and associated memory module test method |
09/26/2002 | DE10111711A1 Repairing memory involves fault detection logic detecting faults during operation and permanently replacing faulty rows and/or columns with replacement rows and/or columns |
09/26/2002 | DE10111439A1 Signal delay circuit has demultiplexer, signal delay lines of different lengths connected to output; connected signal is delayed by defined period proportional to signal delay line length |
09/26/2002 | DE10110469A1 Integrierter Speicher und Verfahren zum Testen und Reparieren desselben Integrated memory and method for testing and repairing the same |
09/25/2002 | EP1242999A1 Usage of redundancy data for displaying failure bit maps for semiconductor devices |
09/25/2002 | EP1242998A1 Method and apparatus for exercising external memory with a memory built-in self-test |
09/25/2002 | EP1080471B1 High speed memory test system with intermediate storage buffer and method of testing |
09/25/2002 | CN1371100A Semiconductor memory used in reducing input cycles of input test mode |
09/25/2002 | CN1371099A Self-analyzing semiconductor IC unit capable of carrying out redundant replacement with installed memory circuits |
09/24/2002 | US6457155 Method for making a memory card adapter insertable into a motherboard memory card socket comprising a memory card receiving socket having the same configuration as the motherboard memory card socket |
09/24/2002 | US6457154 Detecting address faults in an ECC-protected memory |
09/24/2002 | US6457148 Apparatus for testing semiconductor device |
09/24/2002 | US6457141 Semiconductor device with embedded memory cells |
09/24/2002 | US6457067 System and method for detecting faults in storage device addressing logic |
09/24/2002 | US6456561 Synchronous semiconductor memory device |
09/24/2002 | US6456560 Semiconductor integrated circuit device with test interface circuit for performing test on embedded memory from outside |
09/24/2002 | US6456554 Chip identifier and method of fabrication |
09/24/2002 | US6456547 Semiconductor memory device with function of repairing stand-by current failure |
09/24/2002 | US6456546 Repair circuit using antifuse |
09/24/2002 | US6456533 Higher program VT and faster programming rates based on improved erase methods |
09/24/2002 | US6456149 Low current redundancy anti-fuse method and apparatus |
09/24/2002 | US6456101 Chip-on-chip testing using BIST |
09/24/2002 | US6456098 Method of testing memory cells with a hysteresis curve |
09/24/2002 | CA2253949C Data base for persistent data |
09/19/2002 | WO2002073658A2 Yield and speed enhancement of semiconductor integrated circuits using post-fabrication transistor mismatch compensation circuitry |
09/19/2002 | WO2002073411A1 Memory testing method, information recording medium, and semiconductor integrated circuit |
09/19/2002 | WO2002039457A3 Memory management logic for expanding the utilization of read-only memories |
09/19/2002 | WO2002001719A3 Method and apparatus for testing high performance circuits |
09/19/2002 | US20020133770 Circuit and method for test and repair |
09/19/2002 | US20020133769 Circuit and method for test and repair |
09/19/2002 | US20020133768 Configurable and memory architecture independent memory built-in self test |
09/19/2002 | US20020133767 Circuit and method for test and repair |
09/19/2002 | US20020133766 Apparatus and method for providing a diagnostic problem determination methodology for complex systems |
09/19/2002 | US20020133765 Memory testing method and apparatus |
09/19/2002 | US20020133760 Cache thresholding method, apparatus, and program for predictive reporting of array bit line or driver failures |
09/19/2002 | US20020133750 Integrated circuit having a test operating mode and method for testing a multiplicity of such circuits |
09/19/2002 | US20020133742 DRAM memory page operation method and its structure |
09/19/2002 | US20020133312 Setting data retention thresholds in charge-based memory |
09/19/2002 | US20020132379 Method and system for semiconductor die testing |
09/19/2002 | US20020131308 Semiconductor Memory |
09/19/2002 | US20020131307 Semiconductor memory device |
09/19/2002 | US20020131305 Semiconductor memory device |
09/19/2002 | US20020130687 Antifuse reroute of dies |
09/19/2002 | DE10200671A1 Halbleitereinrichtung mit elektrischem Schmelzverbindungselement Semiconductor device with electrical fuse element |
09/19/2002 | DE10110627A1 Controlling test functions for activating rambus dynamic random accecss memory (RDRAM) component |
09/19/2002 | DE10110272A1 Semiconductor memory with built-in test function provided by random number generator with comparison of random number data values entered in parallel in different memory banks |
09/18/2002 | EP1241678A2 Built-in self test circuit employing a linear feedback shift register |
09/18/2002 | EP1060027B1 Circuit and method for specifying performance parameters in integrated circuits |
09/18/2002 | EP0903754B1 Nonvolatile semiconductor memory |
09/18/2002 | EP0757353B1 Multi-port random access memory |
09/18/2002 | CN1091259C Method for detecting operational errors of tester for semiconductor devices |
09/17/2002 | US6453433 Reduced signal test for dynamic random access memory |
09/17/2002 | US6453398 Multiple access self-testing memory |
09/17/2002 | US6452868 Method for generating memory addresses for accessing memory-cell arrays in memory devices |
09/17/2002 | US6452863 Method of operating a memory device having a variable data input length |
09/17/2002 | US6452861 Semiconductor memory device allowing simultaneous inputting of N data signals |
09/17/2002 | US6452859 Dynamic semiconductor memory device superior in refresh characteristics |
09/17/2002 | US6452849 Semiconductor device with test mode for performing efficient calibration of measuring apparatus |
09/17/2002 | US6452848 Programmable built-in self test (BIST) data generator for semiconductor memory devices |
09/17/2002 | US6452847 Testable nonvolatile semiconductor device |
09/17/2002 | US6452846 Driver circuit for a voltage-pulling device |
09/17/2002 | US6452844 Semiconductor storage device having redundancy circuit for replacement of defect cells under tests |
09/17/2002 | US6452843 Method and apparatus for testing high-speed circuits based on slow-speed signals |
09/17/2002 | US6452842 Device and method for supplying current to a semiconductor memory to support a boosted voltage within the memory during testing |
09/17/2002 | US6452837 Nonvolatile semiconductor memory and threshold voltage control method therefor |
09/17/2002 | US6452825 256 meg dynamic random access memory having a programmable multiplexor |
09/17/2002 | US6452459 Circuit for measuring signal delays of synchronous memory elements |
09/12/2002 | WO2002071410A2 Higher program threshold voltage and faster programming rates based on improved erase methods |
09/12/2002 | WO2002071407A2 Asynchronous, high-bandwidth memory component using calibrated timing elements |
09/12/2002 | US20020129316 System and method for multi-channel decoding error correction |
09/12/2002 | US20020129310 Semiconductor integrated circuit with local monitor circuits |
09/12/2002 | US20020129308 Multi-bit test circuit |
09/12/2002 | US20020129302 Method and apparatus for monitoring component latency drifts |
09/12/2002 | US20020129298 Method of and apparatus for testing CPU built-in RAM mixed LSI |
09/12/2002 | US20020128794 Semiconductor device having self test function |
09/12/2002 | US20020126551 Semiconductor memory device and its operation method |
09/12/2002 | US20020126550 Redundant memory circuit for analog semiconductor memory |
09/12/2002 | US20020126549 Embedded memory and method of arranging fuses thereof |