| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
|---|
| 01/08/2003 | EP1274098A1 Cache memory self test circuit |
| 01/08/2003 | EP1273010A2 Method and apparatus for improving the testing, yield and performance of very large scale integrated circuits |
| 01/08/2003 | CN1389917A Clock generating circuit, integrated circuit storage devices and method for using said devices |
| 01/08/2003 | CN1389916A 半导体存储器 Semiconductor memory |
| 01/08/2003 | CN1098535C Semiconductor memory system |
| 01/07/2003 | US6505324 Automated fuse blow software system |
| 01/07/2003 | US6505314 Method and apparatus for processing defect addresses |
| 01/07/2003 | US6505313 Multi-condition BISR test mode for memories with redundancy |
| 01/07/2003 | US6505308 Fast built-in self-repair circuit |
| 01/07/2003 | US6505306 Redundant bit steering mechanism with delayed switchover of fetch operations during redundant device initialization |
| 01/07/2003 | US6505305 Fail-over of multiple memory blocks in multiple memory modules in computer system |
| 01/07/2003 | US6504779 Resistive cross point memory with on-chip sense amplifier calibration method and apparatus |
| 01/07/2003 | US6504773 Memory testing method and memory testing apparatus |
| 01/07/2003 | US6504772 Testing method and test apparatus in semiconductor apparatus |
| 01/07/2003 | US6504771 Semiconductor device, system, and method of controlling accessing to memory |
| 01/07/2003 | US6504770 Semiconductor memory |
| 01/07/2003 | US6504769 Semiconductor memory device employing row repair scheme |
| 01/07/2003 | US6504768 Redundancy selection in memory devices with concurrent read and write |
| 01/07/2003 | US6504762 Highly compact EPROM and flash EEPROM devices |
| 01/07/2003 | US6504744 Semiconductor memory device with memory test circuit |
| 01/07/2003 | US6504741 Semiconductor device in which storage electrode of capacitor is connected to gate electrode of FET and inspection method thereof |
| 01/03/2003 | WO2003001529A2 Method and circuit arrangement for memory redundancy system |
| 01/03/2003 | WO2003001381A1 Method and circuit arrangement for memory error processing |
| 01/03/2003 | WO2003001380A2 Method and apparatus for preservation of failure state in a read destructive memory |
| 01/02/2003 | US20030005377 Intelligent binning for electrically repairable semiconductor chips |
| 01/02/2003 | US20030005375 Algorithmically programmable memory tester with test sites operating in a slave mode |
| 01/02/2003 | US20030005373 Method of testing the data exchange functionality of a memory |
| 01/02/2003 | US20030005372 Testing architecture for a semiconductor memory device |
| 01/02/2003 | US20030005361 Test circuit for testing a synchronous memory circuit |
| 01/02/2003 | US20030005360 Low-jitter clock for test system |
| 01/02/2003 | US20030005353 Methods and apparatus for storing memory test information |
| 01/02/2003 | US20030005250 Method and system for adjusting the timing offset between a clock signal and respective digital signals transmitted along with that clock signal, and memory device and computer system using same |
| 01/02/2003 | US20030005208 Synchronous integrated circuit device |
| 01/02/2003 | US20030002466 Sparse byte enable indicator for high speed memory access arbitration method and apparatus |
| 01/02/2003 | US20030002370 Full stress open digit line memory device |
| 01/02/2003 | US20030002369 Method for checking a conductive connection between contact points |
| 01/02/2003 | US20030002368 Circuit for testing ferroelectric capacitor in fram |
| 01/02/2003 | US20030002367 Semiconductor memory device, and method for testing the same |
| 01/02/2003 | US20030002366 Life warning generation system and method of semiconductor storage device equipped with flash memory |
| 01/02/2003 | US20030002365 Test apparatus for semiconductor device |
| 01/02/2003 | US20030002364 Modular memory structure having adaptable redundancy circuitry |
| 01/02/2003 | US20030002363 Integrated dynamic memory and method for operating it |
| 01/02/2003 | US20030002362 Method for assessing the quality of a memory unit |
| 01/02/2003 | US20030002361 RAM circuit with redundant word lines |
| 01/02/2003 | US20030002360 Device for and method of storing identification data in an integrated circuit |
| 01/02/2003 | US20030002358 Semiconductor memory device capable of adjusting the number of banks and method for adjusting the number of banks |
| 01/02/2003 | US20030002313 Saving content addressable memory power through conditional comparisons |
| 01/02/2003 | US20030001597 Method of testing radiation for a SDRAM |
| 01/02/2003 | US20030001236 Semiconductor chip, memory module and method for testing the semiconductor chip |
| 01/02/2003 | US20030001185 Circuit configuration and method for determining a time constant of a storage capacitor of a memory cell in a semiconductor memory |
| 01/02/2003 | EP1269204A2 Test circuit configuration and method for testing a large number of transistors |
| 01/02/2003 | EP1012849B1 Low cost, highly parallel memory tester |
| 01/01/2003 | CN1388576A Method of determining characteristics of split-gate memory cell |
| 12/31/2002 | US6502218 Deferred correction of a single bit storage error in a cache tag array |
| 12/31/2002 | US6502216 Memory device testing apparatus |
| 12/31/2002 | US6502215 Self-test RAM using external synchronous clock |
| 12/31/2002 | US6502214 Memory test circuit |
| 12/31/2002 | US6502211 Semiconductor memory testing apparatus |
| 12/31/2002 | US6502161 Memory system including a point-to-point linked memory subsystem |
| 12/31/2002 | US6502145 Semiconductor memory with application of predetermined power line potentials |
| 12/31/2002 | US6501817 Area efficient redundancy multiplexer circuit technique for integrated circuit devices providing significantly reduced parasitic capacitance |
| 12/31/2002 | US6501693 Semiconductor memory device allowing easy characteristics evaluation |
| 12/31/2002 | US6501692 Circuit and method for stress testing a static random access memory (SRAM) device |
| 12/31/2002 | US6501691 Word-line deficiency detection method for semiconductor memory device |
| 12/31/2002 | US6501690 Semiconductor memory device capable of concurrently diagnosing a plurality of memory banks and method thereof |
| 12/31/2002 | US6501173 Semiconductor device |
| 12/27/2002 | WO2002103706A2 System and method for identification of faulty or weak memory cells under simulated extreme operating conditions |
| 12/27/2002 | WO2002103705A1 Method for characterizing an active track and latch sense-amp (comparator) in a one time programmable (otp) salicided poly fuse array |
| 12/27/2002 | WO2002103522A2 System and method for built in self repair of memories using speed stress test |
| 12/26/2002 | US20020199152 Method and apparatus for preservation of failure state in a read destructive memory |
| 12/26/2002 | US20020199150 Method for detecting and correcting failures in a memory system |
| 12/26/2002 | US20020199146 Test method and apparatus for semiconductor device and semiconductor device |
| 12/26/2002 | US20020199140 Method and apparatus for collecting and displaying bit-fail-map information |
| 12/26/2002 | US20020199139 Test configuration for a parallel functional testing of semiconductor memory modules and test method |
| 12/26/2002 | US20020199136 System and method for chip testing |
| 12/26/2002 | US20020199130 Automatic address redirecting memory device and the method of the same |
| 12/26/2002 | US20020196697 Semiconductor memory device with improved flexible redundancy scheme |
| 12/26/2002 | US20020196693 System and method for improving dram single cell fail fixability and flexibility repair at module level and universal laser fuse/anti-fuse latch therefor |
| 12/26/2002 | US20020196688 Test circuit for testing a circuit |
| 12/26/2002 | US20020196687 Methods and apparatus for analyzing and repairing memory |
| 12/26/2002 | US20020196686 Method for recognizing and replacing defective memory cells in a memory |
| 12/26/2002 | US20020196684 Semiconductor memory device and method of repairing the same |
| 12/26/2002 | US20020196683 Semiconductor integrated circuit device provided with a self-testing circuit for carrying out an analysis for repair by using a redundant memory cell |
| 12/26/2002 | US20020196681 Semiconductor integrated circuit device and semiconductor memory device reprogrammable after assembly |
| 12/26/2002 | US20020196680 Semiconductor memory device with reduced number of redundant program sets |
| 12/26/2002 | US20020196677 Redundant memory array having dual-use repair elements |
| 12/26/2002 | US20020196672 Semiconductor memory device |
| 12/26/2002 | US20020196671 Dram module and method of using sram to replace damaged dram cell |
| 12/26/2002 | US20020196074 Semiconductor integrated circuit |
| 12/26/2002 | US20020196012 Memory sorting method and apparatus |
| 12/26/2002 | US20020195625 Semiconductor chip with fuse unit |
| 12/25/2002 | CN1387262A Semiconductor IC |
| 12/25/2002 | CN1097230C Buffer memory self-diagnosis method for information signal processing apparatus |
| 12/25/2002 | CN1097227C Error management processes for flash EEPROM memory arrays |
| 12/25/2002 | CN1097225C Method of updating program code for optical disc drive microcontroller and optical disc drive |
| 12/24/2002 | US6499126 Pattern generator and electric part testing apparatus |
| 12/24/2002 | US6499121 Distributed interface for parallel testing of multiple devices using a single tester channel |
| 12/24/2002 | US6499120 Usage of redundancy data for displaying failure bit maps for semiconductor devices |
| 12/24/2002 | US6499119 Data inspection method and apparatus |
| 12/24/2002 | US6499118 Redundancy analysis method and apparatus for ATE |