Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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12/24/2002 | US6498760 Semiconductor device having test mode |
12/24/2002 | US6498757 Structure to inspect high/low of memory cell threshold voltage using current mode sense amplifier |
12/24/2002 | US6498756 Semiconductor memory device having row repair circuitry |
12/24/2002 | US6498755 Semiconductor storage device conducting a late-write operation and controlling a test read-operation to read data not from a data latch circuit but from a memory core circuit regardless of whether a preceding address and a present address match each other |
12/19/2002 | WO2002101749A1 Methods and apparatus for analyzing and repairing memory |
12/19/2002 | WO2002045094A3 Method and apparatus for built-in self-repair of memory storage arrays |
12/19/2002 | US20020194559 Method for test-writing to the cell array of a semiconductor memory |
12/19/2002 | US20020194558 Method and system to optimize test cost and disable defects for scan and BIST memories |
12/19/2002 | US20020194557 Built-in self test circuit using linear feedback shift register |
12/19/2002 | US20020194552 Storage device, data processing system and data writing and readout method |
12/19/2002 | US20020194546 Synchronous semiconductor memory device capable of reducing test cost and method of testing the same |
12/19/2002 | US20020194545 Method of testing embedded memory array and embedded memory controller for use therewith |
12/19/2002 | US20020194539 Automatic timing analyzer |
12/19/2002 | US20020194447 Reconfigurable multi-chip modules |
12/19/2002 | US20020194420 Semiconductor redundant memory provided in common |
12/19/2002 | US20020191472 Semiconductor memory device operating with low power consumption |
12/19/2002 | US20020191470 Architecture, method(s) and circuitry for low power memories |
12/19/2002 | US20020191469 Semiconductor device and method of the semiconductor device |
12/19/2002 | US20020191468 Fuse circuit using anti-fuse and method for searching for failed address in semiconductor memory |
12/19/2002 | US20020191462 Controller for delay locked loop circuits |
12/19/2002 | US20020191454 Memory chip having a test mode and method for checking memory cells of a repaired memory chip |
12/19/2002 | US20020191447 Semiconductor integrated circuit |
12/19/2002 | US20020191440 Externally triggered leakage detection and repair in a flash memory device |
12/19/2002 | US20020191438 Semiconductor device with improved latch arrangement |
12/19/2002 | US20020190708 Memory device tester and method for testing reduced power states |
12/19/2002 | US20020190310 Eeprom cell testing circuit |
12/19/2002 | DE10220328A1 Schaltung zur Taktsignalerzeugung, zugehörige integrierte Schaltkreisbauelemente und Auffrischtaktsteuerverfahren Circuit for clock signal generation, associated integrated circuit devices and Auffrischtaktsteuerverfahren |
12/19/2002 | DE10121131C1 Datenspeicher Data storage |
12/18/2002 | EP1116114B1 Technique for detecting memory part failures and single, double, and triple bit errors |
12/18/2002 | CN1386283A Integrated circuit containing SRAM memory and method of testing same |
12/18/2002 | CN1385859A Electric resistance cross-point memory utilizing checking amplifier demarcating method on chip |
12/18/2002 | CN1096681C Redundancy circuit and method of semiconductor memory device |
12/18/2002 | CN1096639C Digital storage system and method having alternating deferred updating of mirrored storage disks |
12/17/2002 | US6496953 Calibration method and apparatus for correcting pulse width timing errors in integrated circuit testing |
12/17/2002 | US6496952 Semiconductor integrated circuit device, method of manufacturing the device, and computer readable medium |
12/17/2002 | US6496951 Method for testing signal integrity in a data storage system |
12/17/2002 | US6496950 Testing content addressable static memories |
12/17/2002 | US6496947 Built-in self repair circuit with pause for data retention coverage |
12/17/2002 | US6496946 Electronic control apparatus with memory validation and method |
12/17/2002 | US6496876 System and method for storing a tag to identify a functional storage location in a memory device |
12/17/2002 | US6496433 Semiconductor device and semiconductor device testing method |
12/17/2002 | US6496432 Method and apparatus for testing a write function of a dual-port static memory cell |
12/17/2002 | US6496431 Semiconductor integrated circuit |
12/17/2002 | US6496430 Semiconductor memory circuit having selective redundant memory cells |
12/17/2002 | US6496429 Semiconductor memory device |
12/17/2002 | US6496428 Semiconductor memory |
12/17/2002 | US6496427 Nonvolatile semiconductor memory device |
12/17/2002 | US6496426 Redundancy circuit of semiconductor memory device |
12/17/2002 | US6496425 Multiple bit line column redundancy |
12/17/2002 | US6496413 Semiconductor memory device for effecting erasing operation in block unit |
12/17/2002 | US6496027 System for testing integrated circuit devices |
12/17/2002 | US6495856 Semiconductor device having a test pattern same as conductive pattern to be tested and method for testing semiconductor device for short-circuit |
12/12/2002 | WO2002099814A1 Non-volatile semiconductor storage device and production method thereof |
12/12/2002 | WO2002067263A3 Contact system comprising a dielectric antifuse for an ic-memory element and method for producing one such contact system |
12/12/2002 | WO2002027729A3 Writable tracking cells |
12/12/2002 | US20020188902 Test system algorithmic program generators |
12/12/2002 | US20020188900 Test method and test system for semiconductor device |
12/12/2002 | US20020188899 Memory control circuit |
12/12/2002 | US20020188898 Tester built-in semiconductor integrated circuit device |
12/12/2002 | US20020188897 Method for repairing hardware faults in memory chips |
12/12/2002 | US20020188893 Series connected TC unit type ferroelectric RAM and test method thereof |
12/12/2002 | US20020187602 Method of manufacturing semiconductor device |
12/12/2002 | US20020186606 Device and method for repairing a semiconductor memory |
12/12/2002 | US20020186605 Device and method for margin testing a semiconductor memory by applying a stressing voltage simultaneously to complementary and true digit lines |
12/12/2002 | US20020186604 Fail repair circuit of nonvolatile ferroelectric memory device and method for repairing the same |
12/12/2002 | US20020186603 Mode control circuit for semiconductor device and semiconductor memory device having the mode control circuit |
12/12/2002 | US20020186602 Semiconductor device capable of adjusting internal potential |
12/12/2002 | US20020186600 Column repair circuit and method of using nonvolatile ferroelectric memory device |
12/12/2002 | US20020186589 Nonvolatile semiconductor memory device |
12/12/2002 | DE10158310A1 Schaltung und Verfahren zur Spaltenreparatur bei einem nichtflüchtigen ferroelektrischen Speicher Circuit and method for column repair in a non-volatile ferroelectric memory |
12/12/2002 | DE10126610A1 Semiconducting memory chip has at least one contact that passes through from one side of semiconducting chip to opposite side |
12/12/2002 | DE10126599A1 Speicherbaustein, Verfahren zum Aktivieren einer Speicherzelle und Verfahren zum Reparieren einer defekten Speicherzelle Memory device, method of activating a memory cell and method for repairing a defective memory cell |
12/12/2002 | DE10126591A1 Testvorrichtung für dynamische Speichermodule Test apparatus for dynamic memory modules |
12/12/2002 | DE10126301A1 Memory component with test mode has address circuit that activates defective memory cell instead of specified replacement cell if signal from test circuit and address of defective cell applied |
12/12/2002 | DE10125921A1 Arrangement for reducing number of fuses in semiconducting device has decompressor between fuse and fuse latch devices for reading states of fuses of activated master fuse |
12/12/2002 | DE10125028A1 Semiconducting memory with commonly usable cutout devices has activation device for activating redundant column line as replacement line for defective lines |
12/12/2002 | DE10125022A1 Dynamischer Speicher und Verfahren zum Testen eines dynamischen Speichers Dynamic memory and method for testing a dynamic memory |
12/12/2002 | DE10124923A1 Testverfahren zum Testen eines Datenspeichers Test method for testing a data store |
12/12/2002 | DE10122081A1 Verfahren und Vorrichtung zum Kalibrieren eines Testsystems für eine integrierte Halbleiterschaltung Method and apparatus for calibrating a test system for a semiconductor integrated circuit |
12/12/2002 | DE10119125C1 Verfahren zum Vergleich der Adresse eines Speicherzugriffs mit einer bereits bekannten Adresse einer fehlerhaften Speicherzelle A method for comparing the address of a memory access to a known address of a defective memory cell |
12/11/2002 | EP1265255A1 Method and device for failure analysis of physical part objects which are arranged in a physical object in matrix form, computer readable storage medium and computer program element |
12/11/2002 | EP1163680B1 Device and method for carrying out the built-in self-test of an electronic circuit |
12/11/2002 | EP0704801B1 Memory architecture for solid state disc |
12/11/2002 | CN1096111C Speciofic part searching method and device for memory LSIC |
12/11/2002 | CN1096083C Semi-conductor memory device |
12/11/2002 | CN1096080C Semiconductor memory device having dual word line configuration |
12/10/2002 | US6493839 Apparatus and method for testing memory in a microprocessor |
12/10/2002 | US6493836 Method and apparatus for scheduling and using memory calibrations to reduce memory errors in high speed memory devices |
12/10/2002 | US6493829 Semiconductor device enable to output a counter value of an internal clock generation in a test mode |
12/10/2002 | US6493808 Device and process for testing a reprogrammable nonvolatile memory |
12/10/2002 | US6493647 Method and apparatus for exercising external memory with a memory built-in self-test |
12/10/2002 | US6493414 Die information logic and protocol |
12/10/2002 | US6493283 Architecture, method (s) and circuitry for low power memories |
12/10/2002 | US6493279 Semiconductor device capable of simple measurement of oscillation frequency |
12/10/2002 | US6492923 Test system and testing method using memory tester |
12/10/2002 | US6492832 Methods for testing a group of semiconductor devices simultaneously, and devices amenable to such methods of testing |
12/10/2002 | US6492727 Semiconductor device |
12/10/2002 | US6492721 High-voltage signal detecting circuit |
12/10/2002 | US6492706 Programmable pin flag |
12/05/2002 | WO2002097822A1 Semiconductor test apparatus |